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Searched refs:mmSRBM_SOFT_RESET (Results 1 – 25 of 27) sorted by relevance

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/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Dcik_ih.c386 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset()
389 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_ih_soft_reset()
390 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset()
395 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_ih_soft_reset()
396 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_ih_soft_reset()
Dcz_ih.c383 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset()
386 WREG32(mmSRBM_SOFT_RESET, tmp); in cz_ih_soft_reset()
387 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset()
392 WREG32(mmSRBM_SOFT_RESET, tmp); in cz_ih_soft_reset()
393 tmp = RREG32(mmSRBM_SOFT_RESET); in cz_ih_soft_reset()
Diceland_ih.c382 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset()
385 WREG32(mmSRBM_SOFT_RESET, tmp); in iceland_ih_soft_reset()
386 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset()
391 WREG32(mmSRBM_SOFT_RESET, tmp); in iceland_ih_soft_reset()
392 tmp = RREG32(mmSRBM_SOFT_RESET); in iceland_ih_soft_reset()
Dtonga_ih.c434 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset()
437 WREG32(mmSRBM_SOFT_RESET, tmp); in tonga_ih_soft_reset()
438 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset()
443 WREG32(mmSRBM_SOFT_RESET, tmp); in tonga_ih_soft_reset()
444 tmp = RREG32(mmSRBM_SOFT_RESET); in tonga_ih_soft_reset()
Dgmc_v6_0.c1012 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset()
1015 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v6_0_soft_reset()
1016 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset()
1021 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v6_0_soft_reset()
1022 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v6_0_soft_reset()
Dvce_v3_0.c681 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset()
684 WREG32(mmSRBM_SOFT_RESET, tmp); in vce_v3_0_soft_reset()
685 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset()
690 WREG32(mmSRBM_SOFT_RESET, tmp); in vce_v3_0_soft_reset()
691 tmp = RREG32(mmSRBM_SOFT_RESET); in vce_v3_0_soft_reset()
Dsdma_v2_4.c990 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset()
993 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v2_4_soft_reset()
994 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset()
999 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v2_4_soft_reset()
1000 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v2_4_soft_reset()
Dcik_sdma.c1095 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset()
1098 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_sdma_soft_reset()
1099 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset()
1104 WREG32(mmSRBM_SOFT_RESET, tmp); in cik_sdma_soft_reset()
1105 tmp = RREG32(mmSRBM_SOFT_RESET); in cik_sdma_soft_reset()
Dvce_v4_0.c777 tmp = RREG32(mmSRBM_SOFT_RESET);
780 WREG32(mmSRBM_SOFT_RESET, tmp);
781 tmp = RREG32(mmSRBM_SOFT_RESET);
786 WREG32(mmSRBM_SOFT_RESET, tmp);
787 tmp = RREG32(mmSRBM_SOFT_RESET);
Dgmc_v7_0.c1208 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset()
1211 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v7_0_soft_reset()
1212 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset()
1217 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v7_0_soft_reset()
1218 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v7_0_soft_reset()
Dsdma_v3_0.c1324 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset()
1327 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v3_0_soft_reset()
1328 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset()
1333 WREG32(mmSRBM_SOFT_RESET, tmp); in sdma_v3_0_soft_reset()
1334 tmp = RREG32(mmSRBM_SOFT_RESET); in sdma_v3_0_soft_reset()
Duvd_v6_0.c1212 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset()
1215 WREG32(mmSRBM_SOFT_RESET, tmp); in uvd_v6_0_soft_reset()
1216 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset()
1221 WREG32(mmSRBM_SOFT_RESET, tmp); in uvd_v6_0_soft_reset()
1222 tmp = RREG32(mmSRBM_SOFT_RESET); in uvd_v6_0_soft_reset()
Dgmc_v8_0.c1361 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
1364 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v8_0_soft_reset()
1365 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
1370 WREG32(mmSRBM_SOFT_RESET, tmp); in gmc_v8_0_soft_reset()
1371 tmp = RREG32(mmSRBM_SOFT_RESET); in gmc_v8_0_soft_reset()
Duvd_v3_1.c337 WREG32_P(mmSRBM_SOFT_RESET, 0, ~SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK); in uvd_v3_1_start()
780 WREG32_P(mmSRBM_SOFT_RESET, SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK, in uvd_v3_1_soft_reset()
Duvd_v4_2.c293 WREG32_P(mmSRBM_SOFT_RESET, 0, ~SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK); in uvd_v4_2_start()
680 WREG32_P(mmSRBM_SOFT_RESET, SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK, in uvd_v4_2_soft_reset()
Duvd_v5_0.c346 WREG32_P(mmSRBM_SOFT_RESET, 0, ~SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK); in uvd_v5_0_start()
602 WREG32_P(mmSRBM_SOFT_RESET, SRBM_SOFT_RESET__SOFT_RESET_UVD_MASK, in uvd_v5_0_soft_reset()
Duvd_v7_0.c1532 tmp = RREG32(mmSRBM_SOFT_RESET);
1535 WREG32(mmSRBM_SOFT_RESET, tmp);
1536 tmp = RREG32(mmSRBM_SOFT_RESET);
1541 WREG32(mmSRBM_SOFT_RESET, tmp);
1542 tmp = RREG32(mmSRBM_SOFT_RESET);
Ddce_v8_0.c2852 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset()
2855 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v8_0_soft_reset()
2856 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset()
2861 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v8_0_soft_reset()
2862 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v8_0_soft_reset()
Ddce_v10_0.c2960 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset()
2963 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v10_0_soft_reset()
2964 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset()
2969 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v10_0_soft_reset()
2970 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v10_0_soft_reset()
Ddce_v11_0.c3083 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset()
3086 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v11_0_soft_reset()
3087 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset()
3092 WREG32(mmSRBM_SOFT_RESET, tmp); in dce_v11_0_soft_reset()
3093 tmp = RREG32(mmSRBM_SOFT_RESET); in dce_v11_0_soft_reset()
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/oss/
Doss_1_0_d.h262 #define mmSRBM_SOFT_RESET 0x0398 macro
Doss_2_4_d.h83 #define mmSRBM_SOFT_RESET 0x398 macro
Doss_3_0_1_d.h81 #define mmSRBM_SOFT_RESET 0x398 macro
Doss_2_0_d.h77 #define mmSRBM_SOFT_RESET 0x398 macro
Doss_3_0_d.h93 #define mmSRBM_SOFT_RESET 0x398 macro

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