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Searched refs:mmSCRATCH_REG0 (Results 1 – 16 of 16) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_9_4_1_offset.h213 #define mmSCRATCH_REG0 … macro
Dgc_9_0_offset.h4641 #define mmSCRATCH_REG0 … macro
Dgc_9_1_offset.h4871 #define mmSCRATCH_REG0 … macro
Dgc_9_2_1_offset.h4827 #define mmSCRATCH_REG0 … macro
Dgc_10_1_0_offset.h7105 #define mmSCRATCH_REG0 … macro
Dgc_10_3_0_offset.h6730 #define mmSCRATCH_REG0 … macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/gca/
Dgfx_6_0_d.h1181 #define mmSCRATCH_REG0 0x2140 macro
Dgfx_7_0_d.h404 #define mmSCRATCH_REG0 0xc040 macro
Dgfx_7_2_d.h416 #define mmSCRATCH_REG0 0xc040 macro
Dgfx_8_0_d.h454 #define mmSCRATCH_REG0 0xc040 macro
Dgfx_8_1_d.h454 #define mmSCRATCH_REG0 0xc040 macro
/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Dgfx_v9_0.c747 …ch_reg0 = adev->rmmio + (adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG0_BASE_IDX] + mmSCRATCH_REG0)*4; in gfx_v9_0_rlcg_w()
1020 adev->gfx.scratch.reg_base = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0); in gfx_v9_0_scratch_init()
Dgfx_v6_0.c1785 adev->gfx.scratch.reg_base = mmSCRATCH_REG0; in gfx_v6_0_scratch_init()
Dgfx_v7_0.c2068 adev->gfx.scratch.reg_base = mmSCRATCH_REG0; in gfx_v7_0_scratch_init()
Dgfx_v10_0.c1532 (adev->reg_offset[GC_HWIP][0][mmSCRATCH_REG0_BASE_IDX] + mmSCRATCH_REG0) * 4; in gfx_v10_rlcg_rw()
3828 adev->gfx.scratch.reg_base = SOC15_REG_OFFSET(GC, 0, mmSCRATCH_REG0); in gfx_v10_0_scratch_init()
Dgfx_v8_0.c841 adev->gfx.scratch.reg_base = mmSCRATCH_REG0; in gfx_v8_0_scratch_init()