Searched refs:mmRLC_CGCG_CGLS_CTRL_3D (Results 1 – 9 of 9) sorted by relevance
| /Linux-v5.15/drivers/gpu/drm/amd/amdgpu/ |
| D | gfx_v9_0.c | 4982 def = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v9_0_update_3d_clock_gating()
4994 WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); in gfx_v9_0_update_3d_clock_gating()
5004 def = data = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v9_0_update_3d_clock_gating()
5010 WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); in gfx_v9_0_update_3d_clock_gating()
5261 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D)); in gfx_v9_0_get_clockgating_state()
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| D | gfx_v10_0.c | 7998 def = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v10_0_update_3d_clock_gating()
8010 WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); in gfx_v10_0_update_3d_clock_gating()
8020 def = data = RREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D); in gfx_v10_0_update_3d_clock_gating()
8031 WREG32_SOC15(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D, data); in gfx_v10_0_update_3d_clock_gating()
8485 data = RREG32_KIQ(SOC15_REG_OFFSET(GC, 0, mmRLC_CGCG_CGLS_CTRL_3D)); in gfx_v10_0_get_clockgating_state()
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| D | gfx_v8_0.c | 319 mmRLC_CGCG_CGLS_CTRL_3D, 0xffffffff, 0x0001003c,
350 mmRLC_CGCG_CGLS_CTRL_3D, 0xffffffff, 0x0001003c,
382 mmRLC_CGCG_CGLS_CTRL_3D, 0xffffffff, 0x0001003c,
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| /Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_8_0_d.h | 1394 #define mmRLC_CGCG_CGLS_CTRL_3D 0xec9d macro
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| /Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 6253 #define mmRLC_CGCG_CGLS_CTRL_3D … macro
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| D | gc_9_1_offset.h | 6475 #define mmRLC_CGCG_CGLS_CTRL_3D … macro
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| D | gc_9_2_1_offset.h | 6451 #define mmRLC_CGCG_CGLS_CTRL_3D … macro
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| D | gc_10_1_0_offset.h | 9561 #define mmRLC_CGCG_CGLS_CTRL_3D … macro
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| D | gc_10_3_0_offset.h | 9407 #define mmRLC_CGCG_CGLS_CTRL_3D … macro
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