Home
last modified time | relevance | path

Searched refs:mmOTG1_OTG_COUNT_CONTROL_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h4358 #define mmOTG1_OTG_COUNT_CONTROL_BASE_IDX … macro
Ddcn_3_0_1_offset.h6771 #define mmOTG1_OTG_COUNT_CONTROL_BASE_IDX … macro
Ddcn_2_1_0_offset.h8220 #define mmOTG1_OTG_COUNT_CONTROL_BASE_IDX … macro
Ddcn_1_0_offset.h6566 #define mmOTG1_OTG_COUNT_CONTROL_BASE_IDX … macro
Ddcn_3_0_2_offset.h8100 #define mmOTG1_OTG_COUNT_CONTROL_BASE_IDX … macro
Ddcn_2_0_0_offset.h9251 #define mmOTG1_OTG_COUNT_CONTROL_BASE_IDX … macro
Ddcn_3_0_0_offset.h8947 #define mmOTG1_OTG_COUNT_CONTROL_BASE_IDX … macro