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Searched refs:mmOTG0_OTG_COUNT_RESET_BASE_IDX (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h4142 #define mmOTG0_OTG_COUNT_RESET_BASE_IDX … macro
Ddcn_3_0_1_offset.h6555 #define mmOTG0_OTG_COUNT_RESET_BASE_IDX … macro
Ddcn_2_1_0_offset.h8008 #define mmOTG0_OTG_COUNT_RESET_BASE_IDX … macro
Ddcn_1_0_offset.h6350 #define mmOTG0_OTG_COUNT_RESET_BASE_IDX … macro
Ddcn_3_0_2_offset.h7884 #define mmOTG0_OTG_COUNT_RESET_BASE_IDX … macro
Ddcn_2_0_0_offset.h9039 #define mmOTG0_OTG_COUNT_RESET_BASE_IDX … macro
Ddcn_3_0_0_offset.h8729 #define mmOTG0_OTG_COUNT_RESET_BASE_IDX … macro