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Searched refs:mmGCMC_VM_CACHEABLE_DRAM_ADDRESS_END (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/gc/
Dgc_10_1_0_offset.h3709 #define mmGCMC_VM_CACHEABLE_DRAM_ADDRESS_END … macro
Dgc_10_3_0_offset.h3646 #define mmGCMC_VM_CACHEABLE_DRAM_ADDRESS_END … macro
/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Dgfx_v10_0.c3559 SOC15_REG_GOLDEN_VALUE(GC, 0, mmGCMC_VM_CACHEABLE_DRAM_ADDRESS_END, 0xffffffff, 0x000fffff),