Home
last modified time | relevance | path

Searched refs:mmDSCL3_DSCL_MEM_PWR_CTRL_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_1_offset.h5493 #define mmDSCL3_DSCL_MEM_PWR_CTRL_BASE_IDX … macro
Ddcn_2_1_0_offset.h5145 #define mmDSCL3_DSCL_MEM_PWR_CTRL_BASE_IDX … macro
Ddcn_1_0_offset.h4997 #define mmDSCL3_DSCL_MEM_PWR_CTRL_BASE_IDX … macro
Ddcn_3_0_2_offset.h6025 #define mmDSCL3_DSCL_MEM_PWR_CTRL_BASE_IDX … macro
Ddcn_2_0_0_offset.h6083 #define mmDSCL3_DSCL_MEM_PWR_CTRL_BASE_IDX … macro
Ddcn_3_0_0_offset.h6071 #define mmDSCL3_DSCL_MEM_PWR_CTRL_BASE_IDX … macro