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Searched refs:mmDSCL2_DSCL_MEM_PWR_STATUS (Results 1 – 6 of 6) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_1_offset.h4802 #define mmDSCL2_DSCL_MEM_PWR_STATUS … macro
Ddcn_2_1_0_offset.h4572 #define mmDSCL2_DSCL_MEM_PWR_STATUS … macro
Ddcn_1_0_offset.h4523 #define mmDSCL2_DSCL_MEM_PWR_STATUS … macro
Ddcn_3_0_2_offset.h5338 #define mmDSCL2_DSCL_MEM_PWR_STATUS … macro
Ddcn_2_0_0_offset.h5510 #define mmDSCL2_DSCL_MEM_PWR_STATUS … macro
Ddcn_3_0_0_offset.h5384 #define mmDSCL2_DSCL_MEM_PWR_STATUS … macro