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Searched refs:mmDPG_WATERMARK_MASK_CONTROL (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/display/dc/dce80/
Ddce80_resource.c119 - mmDPG_WATERMARK_MASK_CONTROL),
125 - mmDPG_WATERMARK_MASK_CONTROL),
131 - mmDPG_WATERMARK_MASK_CONTROL),
137 - mmDPG_WATERMARK_MASK_CONTROL),
143 - mmDPG_WATERMARK_MASK_CONTROL),
149 - mmDPG_WATERMARK_MASK_CONTROL),
/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Ddce_v8_0.c1061 wm_mask = RREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset); in dce_v8_0_program_watermarks()
1065 WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v8_0_program_watermarks()
1070 tmp = RREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset); in dce_v8_0_program_watermarks()
1073 WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v8_0_program_watermarks()
1078 WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, wm_mask); in dce_v8_0_program_watermarks()
Ddce_v10_0.c1126 wm_mask = RREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset); in dce_v10_0_program_watermarks()
1128 WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v10_0_program_watermarks()
1135 WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v10_0_program_watermarks()
1141 WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, wm_mask); in dce_v10_0_program_watermarks()
Ddce_v11_0.c1152 wm_mask = RREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset); in dce_v11_0_program_watermarks()
1154 WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v11_0_program_watermarks()
1161 WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, tmp); in dce_v11_0_program_watermarks()
1167 WREG32(mmDPG_WATERMARK_MASK_CONTROL + amdgpu_crtc->crtc_offset, wm_mask); in dce_v11_0_program_watermarks()
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_8_0_d.h5180 #define mmDPG_WATERMARK_MASK_CONTROL 0x1b32 macro
Ddce_11_0_d.h6516 #define mmDPG_WATERMARK_MASK_CONTROL 0x1b32 macro
Ddce_10_0_d.h6393 #define mmDPG_WATERMARK_MASK_CONTROL 0x1b32 macro
Ddce_11_2_d.h7814 #define mmDPG_WATERMARK_MASK_CONTROL 0x1b32 macro