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Searched refs:mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h166 #define mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX … macro
Ddcn_3_0_1_offset.h255 #define mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX … macro
Ddcn_2_1_0_offset.h209 #define mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX … macro
Ddcn_1_0_offset.h551 #define mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX … macro
Ddcn_3_0_2_offset.h193 #define mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX … macro
Ddcn_2_0_0_offset.h195 #define mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX … macro
Ddcn_3_0_0_offset.h176 #define mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX … macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h751 #define mmDISPCLK_CGTT_BLK_CTRL_REG_BASE_IDX … macro