Searched refs:mmCP_HQD_PQ_WPTR_HI (Results 1 – 10 of 10) sorted by relevance
| /Linux-v5.15/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_amdkfd_gfx_v10.c | 241 reg <= SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI); reg++) in kgd_hqd_load()
279 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_HI, in kgd_hqd_load()
378 reg <= SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI); reg++) in kgd_hqd_dump()
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| D | amdgpu_amdkfd_gfx_v9.c | 255 reg <= SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI); reg++) in kgd_gfx_v9_hqd_load()
293 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI), in kgd_gfx_v9_hqd_load()
390 reg <= SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI); reg++) in kgd_gfx_v9_hqd_dump()
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| D | amdgpu_amdkfd_gfx_v10_3.c | 226 reg <= SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI); reg++) in hqd_load_v10_3()
264 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_HI, in hqd_load_v10_3()
363 reg <= SOC15_REG_OFFSET(GC, 0, mmCP_HQD_PQ_WPTR_HI); reg++) in hqd_dump_v10_3()
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| D | gfx_v9_0.c | 3649 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_HI, in gfx_v9_0_kiq_init_register()
3708 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_HI, in gfx_v9_0_kiq_init_register()
3760 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_PQ_WPTR_HI, 0); in gfx_v9_0_kiq_fini_register()
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| D | gfx_v10_0.c | 7049 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_HI, in gfx_v10_0_kiq_init_register()
7099 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_WPTR_HI, in gfx_v10_0_kiq_init_register()
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| /Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 2933 #define mmCP_HQD_PQ_WPTR_HI … macro
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| D | gc_9_1_offset.h | 3161 #define mmCP_HQD_PQ_WPTR_HI … macro
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| D | gc_9_2_1_offset.h | 3117 #define mmCP_HQD_PQ_WPTR_HI … macro
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| D | gc_10_1_0_offset.h | 5397 #define mmCP_HQD_PQ_WPTR_HI … macro
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| D | gc_10_3_0_offset.h | 5032 #define mmCP_HQD_PQ_WPTR_HI … macro
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