Searched refs:mmCP_HQD_DEQUEUE_REQUEST (Results 1 – 18 of 18) sorted by relevance
| /Linux-v5.15/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_amdkfd_gfx_v8.c | 481 temp = RREG32(mmCP_HQD_DEQUEUE_REQUEST); in kgd_hqd_destroy()
496 WREG32(mmCP_HQD_DEQUEUE_REQUEST, type); in kgd_hqd_destroy()
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| D | amdgpu_amdkfd_gfx_v7.c | 483 temp = RREG32(mmCP_HQD_DEQUEUE_REQUEST); in kgd_hqd_destroy()
498 WREG32(mmCP_HQD_DEQUEUE_REQUEST, type); in kgd_hqd_destroy()
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| D | amdgpu_amdkfd_gfx_v10.c | 611 temp = RREG32(mmCP_HQD_DEQUEUE_REQUEST); in kgd_hqd_destroy()
627 WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, type); in kgd_hqd_destroy()
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| D | amdgpu_amdkfd_gfx_v9.c | 578 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_DEQUEUE_REQUEST), type); in kgd_gfx_v9_hqd_destroy()
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| D | amdgpu_amdkfd_gfx_v10_3.c | 548 WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, type); in hqd_destroy_v10_3()
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| D | gfx_v9_0.c | 3637 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1); in gfx_v9_0_kiq_init_register()
3643 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, in gfx_v9_0_kiq_init_register()
3735 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1); in gfx_v9_0_kiq_fini_register()
3750 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, in gfx_v9_0_kiq_fini_register()
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| D | gfx_v7_0.c | 2905 WREG32(mmCP_HQD_DEQUEUE_REQUEST, 1); in gfx_v7_0_mqd_deactivate()
2915 WREG32(mmCP_HQD_DEQUEUE_REQUEST, 0); in gfx_v7_0_mqd_deactivate()
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| D | gfx_v10_0.c | 7037 WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1); in gfx_v10_0_kiq_init_register()
7043 WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, in gfx_v10_0_kiq_init_register()
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| D | gfx_v8_0.c | 4433 WREG32(mmCP_HQD_DEQUEUE_REQUEST, 0); in gfx_v8_0_deactivate_hqd()
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| /Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/gca/ |
| D | gfx_7_0_d.h | 591 #define mmCP_HQD_DEQUEUE_REQUEST 0x325d macro
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| D | gfx_7_2_d.h | 604 #define mmCP_HQD_DEQUEUE_REQUEST 0x325d macro
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| D | gfx_8_0_d.h | 654 #define mmCP_HQD_DEQUEUE_REQUEST 0x325d macro
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| D | gfx_8_1_d.h | 654 #define mmCP_HQD_DEQUEUE_REQUEST 0x325d macro
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| /Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/gc/ |
| D | gc_9_0_offset.h | 2865 #define mmCP_HQD_DEQUEUE_REQUEST … macro
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| D | gc_9_1_offset.h | 3093 #define mmCP_HQD_DEQUEUE_REQUEST … macro
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| D | gc_9_2_1_offset.h | 3049 #define mmCP_HQD_DEQUEUE_REQUEST … macro
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| D | gc_10_1_0_offset.h | 5329 #define mmCP_HQD_DEQUEUE_REQUEST … macro
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| D | gc_10_3_0_offset.h | 4964 #define mmCP_HQD_DEQUEUE_REQUEST … macro
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