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Searched refs:mmAZALIA_RIRB_AND_DP_CONTROL_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h1164 #define mmAZALIA_RIRB_AND_DP_CONTROL_BASE_IDX … macro
Ddcn_3_0_1_offset.h1365 #define mmAZALIA_RIRB_AND_DP_CONTROL_BASE_IDX … macro
Ddcn_2_1_0_offset.h1411 #define mmAZALIA_RIRB_AND_DP_CONTROL_BASE_IDX … macro
Ddcn_1_0_offset.h1805 #define mmAZALIA_RIRB_AND_DP_CONTROL_BASE_IDX … macro
Ddcn_3_0_2_offset.h1337 #define mmAZALIA_RIRB_AND_DP_CONTROL_BASE_IDX … macro
Ddcn_2_0_0_offset.h1449 #define mmAZALIA_RIRB_AND_DP_CONTROL_BASE_IDX … macro
Ddcn_3_0_0_offset.h1350 #define mmAZALIA_RIRB_AND_DP_CONTROL_BASE_IDX … macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h1483 #define mmAZALIA_RIRB_AND_DP_CONTROL_BASE_IDX … macro