Home
last modified time | relevance | path

Searched refs:mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h1150 #define mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX … macro
Ddcn_3_0_1_offset.h1351 #define mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX … macro
Ddcn_2_1_0_offset.h1397 #define mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX … macro
Ddcn_1_0_offset.h1791 #define mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX … macro
Ddcn_3_0_2_offset.h1323 #define mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX … macro
Ddcn_2_0_0_offset.h1435 #define mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX … macro
Ddcn_3_0_0_offset.h1336 #define mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX … macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h1469 #define mmAZALIA_CONTROLLER_CLOCK_GATING_BASE_IDX … macro