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Searched refs:mmABM2_BL1_PWM_MINIMUM_DUTY_CYCLE_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_1_offset.h11819 #define mmABM2_BL1_PWM_MINIMUM_DUTY_CYCLE_BASE_IDX … macro
Ddcn_3_0_2_offset.h14491 #define mmABM2_BL1_PWM_MINIMUM_DUTY_CYCLE_BASE_IDX … macro
Ddcn_3_0_0_offset.h16089 #define mmABM2_BL1_PWM_MINIMUM_DUTY_CYCLE_BASE_IDX … macro