Searched refs:mec_hdr (Results 1 – 4 of 4) sorted by relevance
1999 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_0_mec_init() local2024 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_0_mec_init()2028 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_mec_init()2029 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes); in gfx_v9_0_mec_init()2031 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v9_0_mec_init()3396 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v9_0_cp_compute_load_microcode() local3406 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v9_0_cp_compute_load_microcode()3407 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v9_0_cp_compute_load_microcode()3411 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_cp_compute_load_microcode()3424 mec_hdr->jt_offset); in gfx_v9_0_cp_compute_load_microcode()[all …]
2720 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v7_0_cp_compute_load_microcode() local2727 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v7_0_cp_compute_load_microcode()2728 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v7_0_cp_compute_load_microcode()2729 adev->gfx.mec_fw_version = le32_to_cpu(mec_hdr->header.ucode_version); in gfx_v7_0_cp_compute_load_microcode()2731 mec_hdr->ucode_feature_version); in gfx_v7_0_cp_compute_load_microcode()2738 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v7_0_cp_compute_load_microcode()2739 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in gfx_v7_0_cp_compute_load_microcode()
4526 const struct gfx_firmware_header_v1_0 *mec_hdr = NULL; in gfx_v10_0_mec_init() local4553 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v10_0_mec_init()4556 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_mec_init()4557 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes); in gfx_v10_0_mec_init()4559 r = amdgpu_bo_create_reserved(adev, mec_hdr->header.ucode_size_bytes, in gfx_v10_0_mec_init()6515 const struct gfx_firmware_header_v1_0 *mec_hdr; in gfx_v10_0_cp_compute_load_microcode() local6526 mec_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.mec_fw->data; in gfx_v10_0_cp_compute_load_microcode()6527 amdgpu_ucode_print_gfx_hdr(&mec_hdr->header); in gfx_v10_0_cp_compute_load_microcode()6531 le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_cp_compute_load_microcode()6569 for (i = 0; i < mec_hdr->jt_size; i++) in gfx_v10_0_cp_compute_load_microcode()[all …]
4256 const struct gfx_firmware_header_v1_0 *mec_hdr = in cik_cp_compute_load_microcode() local4261 radeon_ucode_print_gfx_hdr(&mec_hdr->header); in cik_cp_compute_load_microcode()4265 (rdev->mec_fw->data + le32_to_cpu(mec_hdr->header.ucode_array_offset_bytes)); in cik_cp_compute_load_microcode()4266 fw_size = le32_to_cpu(mec_hdr->header.ucode_size_bytes) / 4; in cik_cp_compute_load_microcode()4270 WREG32(CP_MEC_ME1_UCODE_ADDR, le32_to_cpu(mec_hdr->header.ucode_version)); in cik_cp_compute_load_microcode()
