Searched refs:me_hdr (Results 1 – 6 of 6) sorted by relevance
2457 const struct gfx_firmware_header_v1_0 *me_hdr; in gfx_v7_0_cp_gfx_load_microcode() local2466 me_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; in gfx_v7_0_cp_gfx_load_microcode()2470 amdgpu_ucode_print_gfx_hdr(&me_hdr->header); in gfx_v7_0_cp_gfx_load_microcode()2473 adev->gfx.me_fw_version = le32_to_cpu(me_hdr->header.ucode_version); in gfx_v7_0_cp_gfx_load_microcode()2474 adev->gfx.me_feature_version = le32_to_cpu(me_hdr->ucode_feature_version); in gfx_v7_0_cp_gfx_load_microcode()2503 le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in gfx_v7_0_cp_gfx_load_microcode()2504 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4; in gfx_v7_0_cp_gfx_load_microcode()
1971 const struct gfx_firmware_header_v1_0 *me_hdr; in gfx_v6_0_cp_gfx_load_microcode() local1981 me_hdr = (const struct gfx_firmware_header_v1_0 *)adev->gfx.me_fw->data; in gfx_v6_0_cp_gfx_load_microcode()1985 amdgpu_ucode_print_gfx_hdr(&me_hdr->header); in gfx_v6_0_cp_gfx_load_microcode()2007 (adev->gfx.me_fw->data + le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in gfx_v6_0_cp_gfx_load_microcode()2008 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4; in gfx_v6_0_cp_gfx_load_microcode()
3197 const struct gfx_firmware_header_v1_0 *me_hdr; in gfx_v9_0_cp_gfx_load_microcode() local3208 me_hdr = (const struct gfx_firmware_header_v1_0 *) in gfx_v9_0_cp_gfx_load_microcode()3213 amdgpu_ucode_print_gfx_hdr(&me_hdr->header); in gfx_v9_0_cp_gfx_load_microcode()3240 le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in gfx_v9_0_cp_gfx_load_microcode()3241 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4; in gfx_v9_0_cp_gfx_load_microcode()
6127 const struct gfx_firmware_header_v1_0 *me_hdr; in gfx_v10_0_cp_gfx_load_me_microcode() local6133 me_hdr = (const struct gfx_firmware_header_v1_0 *) in gfx_v10_0_cp_gfx_load_me_microcode()6136 amdgpu_ucode_print_gfx_hdr(&me_hdr->header); in gfx_v10_0_cp_gfx_load_me_microcode()6139 le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in gfx_v10_0_cp_gfx_load_me_microcode()6140 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes); in gfx_v10_0_cp_gfx_load_me_microcode()6142 r = amdgpu_bo_create_reserved(adev, me_hdr->header.ucode_size_bytes, in gfx_v10_0_cp_gfx_load_me_microcode()6192 for (i = 0; i < me_hdr->jt_size; i++) in gfx_v10_0_cp_gfx_load_me_microcode()6194 le32_to_cpup(fw_data + me_hdr->jt_offset + i)); in gfx_v10_0_cp_gfx_load_me_microcode()
3898 const struct gfx_firmware_header_v1_0 *me_hdr = in cik_cp_gfx_load_microcode() local3905 radeon_ucode_print_gfx_hdr(&me_hdr->header); in cik_cp_gfx_load_microcode()3927 (rdev->me_fw->data + le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in cik_cp_gfx_load_microcode()3928 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4; in cik_cp_gfx_load_microcode()3932 WREG32(CP_ME_RAM_WADDR, le32_to_cpu(me_hdr->header.ucode_version)); in cik_cp_gfx_load_microcode()3933 WREG32(CP_ME_RAM_RADDR, le32_to_cpu(me_hdr->header.ucode_version)); in cik_cp_gfx_load_microcode()
3489 const struct gfx_firmware_header_v1_0 *me_hdr = in si_cp_load_microcode() local3496 radeon_ucode_print_gfx_hdr(&me_hdr->header); in si_cp_load_microcode()3518 (rdev->me_fw->data + le32_to_cpu(me_hdr->header.ucode_array_offset_bytes)); in si_cp_load_microcode()3519 fw_size = le32_to_cpu(me_hdr->header.ucode_size_bytes) / 4; in si_cp_load_microcode()
