Searched refs:lm_ctl (Results 1 – 5 of 5) sorted by relevance
1296 u32 temp_base, lm_ctl = 0; in ca91cx42_lm_set() local1326 lm_ctl |= CA91CX42_LM_CTL_AS_A16; in ca91cx42_lm_set()1329 lm_ctl |= CA91CX42_LM_CTL_AS_A24; in ca91cx42_lm_set()1332 lm_ctl |= CA91CX42_LM_CTL_AS_A32; in ca91cx42_lm_set()1342 lm_ctl |= CA91CX42_LM_CTL_SUPR; in ca91cx42_lm_set()1344 lm_ctl |= CA91CX42_LM_CTL_NPRIV; in ca91cx42_lm_set()1346 lm_ctl |= CA91CX42_LM_CTL_PGM; in ca91cx42_lm_set()1348 lm_ctl |= CA91CX42_LM_CTL_DATA; in ca91cx42_lm_set()1351 iowrite32(lm_ctl, bridge->base + LM_CTL); in ca91cx42_lm_set()1364 u32 lm_ctl, enabled = 0; in ca91cx42_lm_get() local[all …]
1923 u32 lm_base_high, lm_base_low, lm_ctl = 0; in tsi148_lm_set() local1946 lm_ctl |= TSI148_LCSR_LMAT_AS_A16; in tsi148_lm_set()1949 lm_ctl |= TSI148_LCSR_LMAT_AS_A24; in tsi148_lm_set()1952 lm_ctl |= TSI148_LCSR_LMAT_AS_A32; in tsi148_lm_set()1955 lm_ctl |= TSI148_LCSR_LMAT_AS_A64; in tsi148_lm_set()1964 lm_ctl |= TSI148_LCSR_LMAT_SUPR ; in tsi148_lm_set()1966 lm_ctl |= TSI148_LCSR_LMAT_NPRIV; in tsi148_lm_set()1968 lm_ctl |= TSI148_LCSR_LMAT_PGM; in tsi148_lm_set()1970 lm_ctl |= TSI148_LCSR_LMAT_DATA; in tsi148_lm_set()1976 iowrite32be(lm_ctl, bridge->base + TSI148_LCSR_LMAT); in tsi148_lm_set()[all …]
218 struct dpu_hw_ctl *ctl = mixer->lm_ctl; in _dpu_crtc_blend_setup_mixer()302 if (mixer[i].lm_ctl->ops.clear_all_blendstages) in _dpu_crtc_blend_setup()303 mixer[i].lm_ctl->ops.clear_all_blendstages( in _dpu_crtc_blend_setup()304 mixer[i].lm_ctl); in _dpu_crtc_blend_setup()313 ctl = mixer[i].lm_ctl; in _dpu_crtc_blend_setup()556 ctl = mixer[i].lm_ctl; in _dpu_crtc_setup_cp_blocks()1196 m->hw_lm->idx - LM_0, m->lm_ctl->idx - CTL_0, in _dpu_debugfs_status_show()
82 struct dpu_hw_ctl *lm_ctl; member
1044 cstate->mixers[i].lm_ctl = to_dpu_hw_ctl(hw_ctl[ctl_idx]); in dpu_encoder_virt_mode_set()