Searched refs:lane_cnt (Results 1 – 12 of 12) sorted by relevance
260 u8 lane_cnt; member568 u8 lane_cnt; in zynqmp_dp_mode_configure() local587 for (lane_cnt = 1; lane_cnt <= max_lanes; lane_cnt <<= 1) { in zynqmp_dp_mode_configure()592 rate = zynqmp_dp_max_rate(bw, lane_cnt, bpp); in zynqmp_dp_mode_configure()595 dp->mode.lane_cnt = lane_cnt; in zynqmp_dp_mode_configure()618 for (i = 0; i < dp->mode.lane_cnt; i++) { in zynqmp_dp_adjust_train()635 for (i = 0; i < dp->mode.lane_cnt; i++) in zynqmp_dp_adjust_train()655 dp->mode.lane_cnt); in zynqmp_dp_update_vs_emph()659 for (i = 0; i < dp->mode.lane_cnt; i++) { in zynqmp_dp_update_vs_emph()687 u8 lane_cnt = dp->mode.lane_cnt; in zynqmp_dp_link_train_cr() local[all …]
334 u8 lane_cnt = csid->phy.lane_cnt; in csid_configure_stream() local339 if (!lane_cnt) in csid_configure_stream()340 lane_cnt = 4; in csid_configure_stream()431 val |= (lane_cnt - 1) << TPG_CTRL_NUM_ACTIVE_LANES; in csid_configure_stream()437 val = (lane_cnt - 1) << CSI2_RX_CFG0_NUM_ACTIVE_LANES; in csid_configure_stream()
82 u8 lane_cnt; member
217 val = phy->lane_cnt - 1; in csid_configure_stream()
246 val = phy->lane_cnt - 1; in csid_configure_stream()
94 csid->phy.lane_cnt); in csid_set_clock_rates()719 csid->phy.lane_cnt = lane_cfg->num_data; in csid_link_setup()
99 u8 lane_cnt; member430 ctrl->lane_cnt = lane; in edp_fill_link_cfg()431 DBG("rate=%d lane=%d", ctrl->link_rate, ctrl->lane_cnt); in edp_fill_link_cfg()439 data = EDP_CONFIGURATION_CTRL_LANES(ctrl->lane_cnt - 1); in edp_config_ctrl()514 for (i = 0; i < ctrl->lane_cnt; i++) { in edp_sink_train_set_adjust()525 for (i = 0; i < ctrl->lane_cnt; i++) { in edp_sink_train_set_adjust()618 if (drm_dp_clock_recovery_ok(link_status, ctrl->lane_cnt)) { in edp_start_link_train_1()675 if (drm_dp_channel_eq_ok(link_status, ctrl->lane_cnt)) { in edp_start_link_train_2()702 lane = ctrl->lane_cnt; in edp_link_rate_down_shift()731 ctrl->lane_cnt = lane; in edp_link_rate_down_shift()[all …]
25 for (i = 0; i < (phy)->lane_cnt; i++)207 ss_phy->lane_cnt = phy->attrs.bus_width; in samsung_ufs_phy_init()332 phy->lane_cnt = PHY_DEF_LANE_CNT; in samsung_ufs_phy_probe()
126 u8 lane_cnt; member
137 u16 lane_cnt:2; member
740 intel_dsi->lane_count = mipi_config->lane_cnt + 1; in intel_dsi_vbt_init()
1001 int ret = 0, lane, lane_cnt; in dp_ctrl_update_vx_px() local1029 lane_cnt = ctrl->link->link_params.num_lanes; in dp_ctrl_update_vx_px()1030 for (lane = 0; lane < lane_cnt; lane++) in dp_ctrl_update_vx_px()1037 buf, lane_cnt); in dp_ctrl_update_vx_px()1038 if (ret == lane_cnt) in dp_ctrl_update_vx_px()
