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Searched refs:lane_base (Results 1 – 5 of 5) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/msm/dsi/phy/
Ddsi_phy_10nm.c730 void __iomem *lane_base = phy->lane_base; in dsi_phy_hw_v3_0_config_lpcdrx() local
738 dsi_phy_write(lane_base + in dsi_phy_hw_v3_0_config_lpcdrx()
741 dsi_phy_write(lane_base + in dsi_phy_hw_v3_0_config_lpcdrx()
749 void __iomem *lane_base = phy->lane_base; in dsi_phy_hw_v3_0_lane_settings() local
756 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_LPTX_STR_CTRL(i), in dsi_phy_hw_v3_0_lane_settings()
763 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_LPRX_CTRL(i), 0); in dsi_phy_hw_v3_0_lane_settings()
764 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_PIN_SWAP(i), 0x0); in dsi_phy_hw_v3_0_lane_settings()
765 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_HSTX_STR_CTRL(i), in dsi_phy_hw_v3_0_lane_settings()
773 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_CFG0(i), 0x0); in dsi_phy_hw_v3_0_lane_settings()
774 dsi_phy_write(lane_base + REG_DSI_10nm_PHY_LN_CFG1(i), 0x0); in dsi_phy_hw_v3_0_lane_settings()
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Ddsi_phy_7nm.c774 void __iomem *lane_base = phy->lane_base; in dsi_phy_hw_v4_0_config_lpcdrx() local
782 dsi_phy_write(lane_base + in dsi_phy_hw_v4_0_config_lpcdrx()
785 dsi_phy_write(lane_base + in dsi_phy_hw_v4_0_config_lpcdrx()
795 void __iomem *lane_base = phy->lane_base; in dsi_phy_hw_v4_0_lane_settings() local
807 dsi_phy_write(lane_base + REG_DSI_7nm_PHY_LN_LPRX_CTRL(i), 0); in dsi_phy_hw_v4_0_lane_settings()
808 dsi_phy_write(lane_base + REG_DSI_7nm_PHY_LN_PIN_SWAP(i), 0x0); in dsi_phy_hw_v4_0_lane_settings()
815 dsi_phy_write(lane_base + REG_DSI_7nm_PHY_LN_CFG0(i), 0x0); in dsi_phy_hw_v4_0_lane_settings()
816 dsi_phy_write(lane_base + REG_DSI_7nm_PHY_LN_CFG1(i), 0x0); in dsi_phy_hw_v4_0_lane_settings()
817 dsi_phy_write(lane_base + REG_DSI_7nm_PHY_LN_CFG2(i), i == 4 ? 0x8a : 0xa); in dsi_phy_hw_v4_0_lane_settings()
818 dsi_phy_write(lane_base + REG_DSI_7nm_PHY_LN_TX_DCTRL(i), tx_dctrl[i]); in dsi_phy_hw_v4_0_lane_settings()
Ddsi_phy_14nm.c909 void __iomem *base = phy->lane_base; in dsi_14nm_dphy_set_timing()
950 void __iomem *lane_base = phy->lane_base; in dsi_14nm_phy_enable() local
968 dsi_phy_write(lane_base + REG_DSI_14nm_PHY_LN_VREG_CNTRL(i), in dsi_14nm_phy_enable()
971 dsi_phy_write(lane_base + in dsi_14nm_phy_enable()
973 dsi_phy_write(lane_base + in dsi_14nm_phy_enable()
977 dsi_phy_write(lane_base + REG_DSI_14nm_PHY_LN_CFG3(i), in dsi_14nm_phy_enable()
979 dsi_phy_write(lane_base + REG_DSI_14nm_PHY_LN_CFG2(i), 0x10); in dsi_14nm_phy_enable()
980 dsi_phy_write(lane_base + REG_DSI_14nm_PHY_LN_TEST_DATAPATH(i), in dsi_14nm_phy_enable()
982 dsi_phy_write(lane_base + REG_DSI_14nm_PHY_LN_TEST_STR(i), in dsi_14nm_phy_enable()
Ddsi_phy.h89 void __iomem *lane_base; member
Ddsi_phy.c725 phy->lane_base = msm_ioremap_size(pdev, "dsi_phy_lane", "DSI_PHY_LANE", &phy->lane_size); in dsi_phy_driver_probe()
726 if (IS_ERR(phy->lane_base)) { in dsi_phy_driver_probe()
939 if (phy->lane_base) in msm_dsi_phy_snapshot()
941 phy->lane_size, phy->lane_base, in msm_dsi_phy_snapshot()