| /Linux-v5.15/drivers/gpu/drm/amd/amdgpu/ |
| D | amdgpu_gfx.c | 466 struct amdgpu_ring *kiq_ring = &kiq->ring; in amdgpu_gfx_disable_kcq() local 473 if (amdgpu_ring_alloc(kiq_ring, kiq->pmf->unmap_queues_size * in amdgpu_gfx_disable_kcq() 480 kiq->pmf->kiq_unmap_queues(kiq_ring, &adev->gfx.compute_ring[i], in amdgpu_gfx_disable_kcq() 482 r = amdgpu_ring_test_helper(kiq_ring); in amdgpu_gfx_disable_kcq() 504 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in amdgpu_gfx_enable_kcq() local 526 DRM_INFO("kiq ring mec %d pipe %d q %d\n", kiq_ring->me, kiq_ring->pipe, in amdgpu_gfx_enable_kcq() 527 kiq_ring->queue); in amdgpu_gfx_enable_kcq() 529 r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size * in amdgpu_gfx_enable_kcq() 538 kiq->pmf->kiq_set_resources(kiq_ring, queue_mask); in amdgpu_gfx_enable_kcq() 540 kiq->pmf->kiq_map_queues(kiq_ring, &adev->gfx.compute_ring[i]); in amdgpu_gfx_enable_kcq() [all …]
|
| D | amdgpu_amdkfd_gfx_v10.c | 309 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in kgd_hiq_mqd_load() local 325 r = amdgpu_ring_alloc(kiq_ring, 7); in kgd_hiq_mqd_load() 331 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); in kgd_hiq_mqd_load() 332 amdgpu_ring_write(kiq_ring, in kgd_hiq_mqd_load() 342 amdgpu_ring_write(kiq_ring, in kgd_hiq_mqd_load() 344 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo); in kgd_hiq_mqd_load() 345 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi); in kgd_hiq_mqd_load() 346 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in kgd_hiq_mqd_load() 347 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi); in kgd_hiq_mqd_load() 348 amdgpu_ring_commit(kiq_ring); in kgd_hiq_mqd_load()
|
| D | amdgpu_amdkfd_gfx_v9.c | 321 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in kgd_gfx_v9_hiq_mqd_load() local 337 r = amdgpu_ring_alloc(kiq_ring, 7); in kgd_gfx_v9_hiq_mqd_load() 343 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); in kgd_gfx_v9_hiq_mqd_load() 344 amdgpu_ring_write(kiq_ring, in kgd_gfx_v9_hiq_mqd_load() 354 amdgpu_ring_write(kiq_ring, in kgd_gfx_v9_hiq_mqd_load() 356 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo); in kgd_gfx_v9_hiq_mqd_load() 357 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi); in kgd_gfx_v9_hiq_mqd_load() 358 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in kgd_gfx_v9_hiq_mqd_load() 359 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi); in kgd_gfx_v9_hiq_mqd_load() 360 amdgpu_ring_commit(kiq_ring); in kgd_gfx_v9_hiq_mqd_load()
|
| D | amdgpu_gfx.h | 83 void (*kiq_set_resources)(struct amdgpu_ring *kiq_ring, 85 void (*kiq_map_queues)(struct amdgpu_ring *kiq_ring, 87 void (*kiq_unmap_queues)(struct amdgpu_ring *kiq_ring, 91 void (*kiq_query_status)(struct amdgpu_ring *kiq_ring, 95 void (*kiq_invalidate_tlbs)(struct amdgpu_ring *kiq_ring,
|
| D | amdgpu_amdkfd_gfx_v10_3.c | 294 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in hiq_mqd_load_v10_3() local 310 r = amdgpu_ring_alloc(kiq_ring, 7); in hiq_mqd_load_v10_3() 316 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_MAP_QUEUES, 5)); in hiq_mqd_load_v10_3() 317 amdgpu_ring_write(kiq_ring, in hiq_mqd_load_v10_3() 327 amdgpu_ring_write(kiq_ring, in hiq_mqd_load_v10_3() 329 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_lo); in hiq_mqd_load_v10_3() 330 amdgpu_ring_write(kiq_ring, m->cp_mqd_base_addr_hi); in hiq_mqd_load_v10_3() 331 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_lo); in hiq_mqd_load_v10_3() 332 amdgpu_ring_write(kiq_ring, m->cp_hqd_pq_wptr_poll_addr_hi); in hiq_mqd_load_v10_3() 333 amdgpu_ring_commit(kiq_ring); in hiq_mqd_load_v10_3()
|
| D | gfx_v9_0.c | 826 static void gfx_v9_0_kiq_set_resources(struct amdgpu_ring *kiq_ring, in gfx_v9_0_kiq_set_resources() argument 829 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); in gfx_v9_0_kiq_set_resources() 830 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources() 834 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources() 836 amdgpu_ring_write(kiq_ring, in gfx_v9_0_kiq_set_resources() 838 amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */ in gfx_v9_0_kiq_set_resources() 839 amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */ in gfx_v9_0_kiq_set_resources() 840 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx_v9_0_kiq_set_resources() 841 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx_v9_0_kiq_set_resources() 844 static void gfx_v9_0_kiq_map_queues(struct amdgpu_ring *kiq_ring, in gfx_v9_0_kiq_map_queues() argument [all …]
|
| D | mes_v10_1.c | 790 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; 796 r = amdgpu_ring_alloc(kiq_ring, kiq->pmf->map_queues_size); 802 kiq->pmf->kiq_map_queues(kiq_ring, &adev->mes.ring); 804 r = amdgpu_ring_test_ring(kiq_ring); 807 kiq_ring->sched.ready = false;
|
| D | gfx_v10_0.c | 3610 static void gfx10_kiq_set_resources(struct amdgpu_ring *kiq_ring, uint64_t queue_mask) in gfx10_kiq_set_resources() argument 3612 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); in gfx10_kiq_set_resources() 3613 amdgpu_ring_write(kiq_ring, PACKET3_SET_RESOURCES_VMID_MASK(0) | in gfx10_kiq_set_resources() 3615 amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */ in gfx10_kiq_set_resources() 3616 amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */ in gfx10_kiq_set_resources() 3617 amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */ in gfx10_kiq_set_resources() 3618 amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */ in gfx10_kiq_set_resources() 3619 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx10_kiq_set_resources() 3620 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx10_kiq_set_resources() 3623 static void gfx10_kiq_map_queues(struct amdgpu_ring *kiq_ring, in gfx10_kiq_map_queues() argument [all …]
|
| D | gfx_v8_0.c | 4360 struct amdgpu_ring *kiq_ring = &adev->gfx.kiq.ring; in gfx_v8_0_kiq_kcq_enable() local 4379 r = amdgpu_ring_alloc(kiq_ring, (8 * adev->gfx.num_compute_rings) + 8); in gfx_v8_0_kiq_kcq_enable() 4385 amdgpu_ring_write(kiq_ring, PACKET3(PACKET3_SET_RESOURCES, 6)); in gfx_v8_0_kiq_kcq_enable() 4386 amdgpu_ring_write(kiq_ring, 0); /* vmid_mask:0 queue_type:0 (KIQ) */ in gfx_v8_0_kiq_kcq_enable() 4387 amdgpu_ring_write(kiq_ring, lower_32_bits(queue_mask)); /* queue mask lo */ in gfx_v8_0_kiq_kcq_enable() 4388 amdgpu_ring_write(kiq_ring, upper_32_bits(queue_mask)); /* queue mask hi */ in gfx_v8_0_kiq_kcq_enable() 4389 amdgpu_ring_write(kiq_ring, 0); /* gws mask lo */ in gfx_v8_0_kiq_kcq_enable() 4390 amdgpu_ring_write(kiq_ring, 0); /* gws mask hi */ in gfx_v8_0_kiq_kcq_enable() 4391 amdgpu_ring_write(kiq_ring, 0); /* oac mask */ in gfx_v8_0_kiq_kcq_enable() 4392 amdgpu_ring_write(kiq_ring, 0); /* gds heap base:0, gds heap size:0 */ in gfx_v8_0_kiq_kcq_enable() [all …]
|