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Searched refs:ixAZF0ENDPOINT5_AZALIA_F0_CODEC_PIN_CONTROL_LPIB (Results 1 – 9 of 9) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
Ddcn_3_0_3_offset.h8050 #define ixAZF0ENDPOINT5_AZALIA_F0_CODEC_PIN_CONTROL_LPIB … macro
Ddcn_3_0_1_offset.h12893 #define ixAZF0ENDPOINT5_AZALIA_F0_CODEC_PIN_CONTROL_LPIB … macro
Ddcn_2_1_0_offset.h13497 #define ixAZF0ENDPOINT5_AZALIA_F0_CODEC_PIN_CONTROL_LPIB … macro
Ddcn_1_0_offset.h13737 #define ixAZF0ENDPOINT5_AZALIA_F0_CODEC_PIN_CONTROL_LPIB … macro
Ddcn_3_1_2_offset.h14705 #define ixAZF0ENDPOINT5_AZALIA_F0_CODEC_PIN_CONTROL_LPIB … macro
Ddcn_3_0_2_offset.h15782 #define ixAZF0ENDPOINT5_AZALIA_F0_CODEC_PIN_CONTROL_LPIB … macro
Ddcn_2_0_0_offset.h17161 #define ixAZF0ENDPOINT5_AZALIA_F0_CODEC_PIN_CONTROL_LPIB … macro
Ddcn_3_0_0_offset.h17503 #define ixAZF0ENDPOINT5_AZALIA_F0_CODEC_PIN_CONTROL_LPIB … macro
/Linux-v5.15/drivers/gpu/drm/amd/include/asic_reg/dce/
Ddce_12_0_offset.h17550 #define ixAZF0ENDPOINT5_AZALIA_F0_CODEC_PIN_CONTROL_LPIB … macro