Searched refs:idle_info (Results 1 – 6 of 6) sorted by relevance
| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn301/ |
| D | dcn301_smu.c | 199 void dcn301_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn301_smu_set_display_idle_optimization() argument
203 DC_LOG_DEBUG("%s(%x)\n", __func__, idle_info); in dcn301_smu_set_display_idle_optimization()
208 idle_info); in dcn301_smu_set_display_idle_optimization()
213 union display_idle_optimization_u idle_info = { 0 }; in dcn301_smu_enable_phy_refclk_pwrdwn() local
216 idle_info.idle_info.df_request_disabled = 1; in dcn301_smu_enable_phy_refclk_pwrdwn()
217 idle_info.idle_info.phy_ref_clk_off = 1; in dcn301_smu_enable_phy_refclk_pwrdwn()
225 idle_info.data); in dcn301_smu_enable_phy_refclk_pwrdwn()
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| D | dcn301_smu.h | 145 struct display_idle_optimization idle_info; member
156 void dcn301_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info);
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| D | vg_clk_mgr.c | 118 union display_idle_optimization_u idle_info = { 0 }; in vg_update_clocks() local
120 idle_info.idle_info.df_request_disabled = 1; in vg_update_clocks()
121 idle_info.idle_info.phy_ref_clk_off = 1; in vg_update_clocks()
123 dcn301_smu_set_display_idle_optimization(clk_mgr, idle_info.data); in vg_update_clocks()
131 union display_idle_optimization_u idle_info = { 0 }; in vg_update_clocks() local
133 dcn301_smu_set_display_idle_optimization(clk_mgr, idle_info.data); in vg_update_clocks()
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| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn31/ |
| D | dcn31_smu.c | 223 void dcn31_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info) in dcn31_smu_set_display_idle_optimization() argument
235 idle_info); in dcn31_smu_set_display_idle_optimization()
240 union display_idle_optimization_u idle_info = { 0 }; in dcn31_smu_enable_phy_refclk_pwrdwn() local
246 idle_info.idle_info.df_request_disabled = 1; in dcn31_smu_enable_phy_refclk_pwrdwn()
247 idle_info.idle_info.phy_ref_clk_off = 1; in dcn31_smu_enable_phy_refclk_pwrdwn()
253 idle_info.data); in dcn31_smu_enable_phy_refclk_pwrdwn()
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| D | dcn31_clk_mgr.c | 157 union display_idle_optimization_u idle_info = { 0 }; in dcn31_update_clocks() local
158 idle_info.idle_info.df_request_disabled = 1; in dcn31_update_clocks()
159 idle_info.idle_info.phy_ref_clk_off = 1; in dcn31_update_clocks()
160 dcn31_smu_set_display_idle_optimization(clk_mgr, idle_info.data); in dcn31_update_clocks()
179 union display_idle_optimization_u idle_info = { 0 }; in dcn31_update_clocks() local
180 dcn31_smu_set_display_idle_optimization(clk_mgr, idle_info.data); in dcn31_update_clocks()
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| D | dcn31_smu.h | 250 struct display_idle_optimization idle_info; member
260 void dcn31_smu_set_display_idle_optimization(struct clk_mgr_internal *clk_mgr, uint32_t idle_info);
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