| /Linux-v5.15/drivers/gpu/drm/i915/ |
| D | intel_uncore.h | 94 i915_reg_t r);
96 i915_reg_t r);
99 i915_reg_t r, bool trace);
101 i915_reg_t r, bool trace);
103 i915_reg_t r, bool trace);
105 i915_reg_t r, bool trace);
108 i915_reg_t r, u8 val, bool trace);
110 i915_reg_t r, u16 val, bool trace);
112 i915_reg_t r, u32 val, bool trace);
198 i915_reg_t reg,
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| D | i915_irq.h | 124 void gen3_irq_reset(struct intel_uncore *uncore, i915_reg_t imr,
125 i915_reg_t iir, i915_reg_t ier);
130 i915_reg_t imr, u32 imr_val,
131 i915_reg_t ier, u32 ier_val,
132 i915_reg_t iir);
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| D | intel_uncore.c | 952 static const i915_reg_t gen8_shadowed_regs[] = {
962 static const i915_reg_t gen11_shadowed_regs[] = {
984 static const i915_reg_t gen12_shadowed_regs[] = {
1006 static const i915_reg_t xehp_shadowed_regs[] = {
1040 static int mmio_reg_cmp(u32 key, const i915_reg_t *reg) in mmio_reg_cmp()
1055 const i915_reg_t *regs = x##_shadowed_regs; \
1066 gen6_reg_write_fw_domains(struct intel_uncore *uncore, i915_reg_t reg) in __is_X_shadowed()
1497 const i915_reg_t reg, in __unclaimed_reg_debug()
1512 const i915_reg_t reg, in unclaimed_reg_debug()
1533 vgpu_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { \
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| /Linux-v5.15/drivers/gpu/drm/i915/display/ |
| D | intel_de.h | 15 intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) in intel_de_read()
21 intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg) in intel_de_posting_read()
27 intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, u32 val) in intel_de_write()
33 intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set) in intel_de_rmw()
39 intel_de_wait_for_register(struct drm_i915_private *i915, i915_reg_t reg, in intel_de_wait_for_register()
46 intel_de_wait_for_set(struct drm_i915_private *i915, i915_reg_t reg, in intel_de_wait_for_set()
53 intel_de_wait_for_clear(struct drm_i915_private *i915, i915_reg_t reg, in intel_de_wait_for_clear()
68 intel_de_read_fw(struct drm_i915_private *i915, i915_reg_t reg) in intel_de_read_fw()
79 intel_de_write_fw(struct drm_i915_private *i915, i915_reg_t reg, u32 val) in intel_de_write_fw()
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| D | intel_sdvo.h | 18 i915_reg_t sdvo_reg, enum pipe *pipe);
20 i915_reg_t reg, enum port port);
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| D | intel_dp_aux.c | 39 i915_reg_t ch_ctl = intel_dp->aux_ch_ctl_reg(intel_dp); in intel_dp_aux_wait_done()
192 i915_reg_t ch_ctl, ch_data[5]; in intel_dp_aux_xfer()
478 static i915_reg_t g4x_aux_ctl_reg(struct intel_dp *intel_dp) in g4x_aux_ctl_reg()
495 static i915_reg_t g4x_aux_data_reg(struct intel_dp *intel_dp, int index) in g4x_aux_data_reg()
512 static i915_reg_t ilk_aux_ctl_reg(struct intel_dp *intel_dp) in ilk_aux_ctl_reg()
531 static i915_reg_t ilk_aux_data_reg(struct intel_dp *intel_dp, int index) in ilk_aux_data_reg()
550 static i915_reg_t skl_aux_ctl_reg(struct intel_dp *intel_dp) in skl_aux_ctl_reg()
570 static i915_reg_t skl_aux_data_reg(struct intel_dp *intel_dp, int index) in skl_aux_data_reg()
590 static i915_reg_t tgl_aux_ctl_reg(struct intel_dp *intel_dp) in tgl_aux_ctl_reg()
613 static i915_reg_t tgl_aux_data_reg(struct intel_dp *intel_dp, int index) in tgl_aux_data_reg()
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| D | g4x_dp.h | 25 i915_reg_t dp_reg, enum port port,
28 i915_reg_t output_reg, enum port port);
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| D | intel_dsb.h | 46 i915_reg_t reg, u32 val);
48 i915_reg_t reg, u32 val);
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| D | intel_vga.c | 15 static i915_reg_t intel_vga_cntrl_reg(struct drm_i915_private *i915) in intel_vga_cntrl_reg()
29 i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv); in intel_vga_disable()
49 i915_reg_t vga_reg = intel_vga_cntrl_reg(dev_priv); in intel_vga_redisable_power_on()
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| D | intel_dvo_dev.h | 36 i915_reg_t dvo_reg;
37 i915_reg_t dvo_srcdim_reg;
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| D | intel_pps.c | 350 i915_reg_t pp_ctrl;
351 i915_reg_t pp_stat;
352 i915_reg_t pp_on;
353 i915_reg_t pp_off;
354 i915_reg_t pp_div;
383 static i915_reg_t
393 static i915_reg_t
461 i915_reg_t pp_stat_reg, pp_ctrl_reg; in wait_panel_status()
577 i915_reg_t pp_stat_reg, pp_ctrl_reg; in intel_pps_vdd_on_unlocked()
655 i915_reg_t pp_stat_reg, pp_ctrl_reg; in intel_pps_vdd_off_sync_unlocked()
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| D | intel_display_power.h | 188 i915_reg_t bios;
189 i915_reg_t driver;
190 i915_reg_t kvmr;
191 i915_reg_t debug;
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| D | intel_ddi.h | 23 i915_reg_t dp_tp_ctl_reg(struct intel_encoder *encoder,
25 i915_reg_t dp_tp_status_reg(struct intel_encoder *encoder,
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| D | intel_dvo.c | 194 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; in intel_disable_dvo()
209 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; in intel_enable_dvo()
289 i915_reg_t dvo_reg = intel_dvo->dev.dvo_reg; in intel_dvo_pre_enable()
290 i915_reg_t dvo_srcdim_reg = intel_dvo->dev.dvo_srcdim_reg; in intel_dvo_pre_enable()
406 static enum port intel_dvo_port(i915_reg_t dvo_reg) in intel_dvo_port()
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| D | g4x_hdmi.h | 17 i915_reg_t hdmi_reg, enum port port);
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| D | intel_fdi.c | 153 i915_reg_t reg; in intel_fdi_normal_train()
196 i915_reg_t reg; in ilk_fdi_link_train()
299 i915_reg_t reg; in gen6_fdi_link_train()
436 i915_reg_t reg; in ivb_manual_fdi_link_train()
696 i915_reg_t reg; in ilk_fdi_pll_enable()
733 i915_reg_t reg; in ilk_fdi_pll_disable()
762 i915_reg_t reg; in ilk_fdi_disable()
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| D | intel_crt.h | 16 i915_reg_t adpa_reg, enum pipe *pipe);
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| D | intel_lvds.h | 17 i915_reg_t lvds_reg, enum pipe *pipe);
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| /Linux-v5.15/drivers/gpu/drm/i915/gt/ |
| D | intel_rc6.h | 24 u64 intel_rc6_residency_ns(struct intel_rc6 *rc6, i915_reg_t reg);
25 u64 intel_rc6_residency_us(struct intel_rc6 *rc6, i915_reg_t reg);
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| D | intel_gt_pm_irq.c | 17 i915_reg_t reg; in write_pm_imr()
64 i915_reg_t reg = GRAPHICS_VER(gt->i915) >= 8 ? GEN8_GT_IIR(2) : GEN6_PMIIR; in gen6_gt_pm_reset_iir()
78 i915_reg_t reg; in write_pm_ier()
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| D | intel_gt.c | 241 static void rmw_set(struct intel_uncore *uncore, i915_reg_t reg, u32 set) in rmw_set()
246 static void rmw_clear(struct intel_uncore *uncore, i915_reg_t reg, u32 clr) in rmw_clear()
251 static void clear_register(struct intel_uncore *uncore, i915_reg_t reg) in clear_register()
332 i915_reg_t fault_reg, fault_data0_reg, fault_data1_reg; in gen8_check_faults()
800 i915_reg_t reg, in intel_gt_reg_needs_read_steering()
872 u32 intel_gt_read_register_fw(struct intel_gt *gt, i915_reg_t reg) in intel_gt_read_register_fw()
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| D | intel_workarounds_types.h | 14 i915_reg_t reg;
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| D | intel_workarounds.c | 152 static void wa_add(struct i915_wa_list *wal, i915_reg_t reg, in wa_add()
167 wa_write_clr_set(struct i915_wa_list *wal, i915_reg_t reg, u32 clear, u32 set) in wa_write_clr_set()
173 wa_write(struct i915_wa_list *wal, i915_reg_t reg, u32 set) in wa_write()
179 wa_write_or(struct i915_wa_list *wal, i915_reg_t reg, u32 set) in wa_write_or()
185 wa_write_clr(struct i915_wa_list *wal, i915_reg_t reg, u32 clr) in wa_write_clr()
202 wa_masked_en(struct i915_wa_list *wal, i915_reg_t reg, u32 val) in wa_masked_en()
208 wa_masked_dis(struct i915_wa_list *wal, i915_reg_t reg, u32 val) in wa_masked_dis()
214 wa_masked_field_set(struct i915_wa_list *wal, i915_reg_t reg, in wa_masked_field_set()
893 i915_reg_t steering_reg, in __set_mcr_steering()
1332 whitelist_reg_ext(struct i915_wa_list *wal, i915_reg_t reg, u32 flags) in whitelist_reg_ext()
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| /Linux-v5.15/drivers/gpu/drm/i915/selftests/ |
| D | intel_uncore.c | 65 const i915_reg_t *regs; in intel_shadow_table_check()
73 const i915_reg_t *reg; in intel_shadow_table_check()
196 i915_reg_t mmio = _MMIO(engine->mmio_base + r->offset); in live_forcewake_ops()
288 i915_reg_t reg = { offset }; in live_forcewake_domains()
299 i915_reg_t reg = { offset }; in live_forcewake_domains()
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| D | mock_uncore.c | 29 nop_write##x(struct intel_uncore *uncore, i915_reg_t reg, u##x val, bool trace) { }
36 nop_read##x(struct intel_uncore *uncore, i915_reg_t reg, bool trace) { return 0; }
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