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Searched refs:i915 (Results 1 – 25 of 334) sorted by relevance

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/Linux-v5.15/drivers/gpu/drm/i915/selftests/
Dmock_gem_device.c46 void mock_device_flush(struct drm_i915_private *i915) in mock_device_flush() argument
48 struct intel_gt *gt = &i915->gt; in mock_device_flush()
61 struct drm_i915_private *i915 = to_i915(dev); in mock_device_release() local
63 if (!i915->do_release) in mock_device_release()
66 mock_device_flush(i915); in mock_device_release()
67 intel_gt_driver_remove(&i915->gt); in mock_device_release()
69 i915_gem_drain_workqueue(i915); in mock_device_release()
70 i915_gem_drain_freed_objects(i915); in mock_device_release()
72 mock_fini_ggtt(&i915->ggtt); in mock_device_release()
73 destroy_workqueue(i915->wq); in mock_device_release()
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Di915_gem.c42 static void trash_stolen(struct drm_i915_private *i915) in trash_stolen() argument
44 struct i915_ggtt *ggtt = &i915->ggtt; in trash_stolen()
46 const resource_size_t size = resource_size(&i915->dsm); in trash_stolen()
55 const dma_addr_t dma = i915->dsm.start + page; in trash_stolen()
72 static void simulate_hibernate(struct drm_i915_private *i915) in simulate_hibernate() argument
76 wakeref = intel_runtime_pm_get(&i915->runtime_pm); in simulate_hibernate()
85 trash_stolen(i915); in simulate_hibernate()
87 intel_runtime_pm_put(&i915->runtime_pm, wakeref); in simulate_hibernate()
90 static int igt_pm_prepare(struct drm_i915_private *i915) in igt_pm_prepare() argument
92 i915_gem_suspend(i915); in igt_pm_prepare()
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/Linux-v5.15/drivers/gpu/drm/i915/
Dintel_sideband.h28 void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports);
29 u32 vlv_iosf_sb_read(struct drm_i915_private *i915, u8 port, u32 reg);
30 void vlv_iosf_sb_write(struct drm_i915_private *i915,
32 void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports);
34 static inline void vlv_bunit_get(struct drm_i915_private *i915) in vlv_bunit_get() argument
36 vlv_iosf_sb_get(i915, BIT(VLV_IOSF_SB_BUNIT)); in vlv_bunit_get()
39 u32 vlv_bunit_read(struct drm_i915_private *i915, u32 reg);
40 void vlv_bunit_write(struct drm_i915_private *i915, u32 reg, u32 val);
42 static inline void vlv_bunit_put(struct drm_i915_private *i915) in vlv_bunit_put() argument
44 vlv_iosf_sb_put(i915, BIT(VLV_IOSF_SB_BUNIT)); in vlv_bunit_put()
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Dintel_sideband.c48 static void __vlv_punit_get(struct drm_i915_private *i915) in __vlv_punit_get() argument
62 if (IS_VALLEYVIEW(i915)) { in __vlv_punit_get()
63 cpu_latency_qos_update_request(&i915->sb_qos, 0); in __vlv_punit_get()
68 static void __vlv_punit_put(struct drm_i915_private *i915) in __vlv_punit_put() argument
70 if (IS_VALLEYVIEW(i915)) in __vlv_punit_put()
71 cpu_latency_qos_update_request(&i915->sb_qos, in __vlv_punit_put()
77 void vlv_iosf_sb_get(struct drm_i915_private *i915, unsigned long ports) in vlv_iosf_sb_get() argument
80 __vlv_punit_get(i915); in vlv_iosf_sb_get()
82 mutex_lock(&i915->sb_lock); in vlv_iosf_sb_get()
85 void vlv_iosf_sb_put(struct drm_i915_private *i915, unsigned long ports) in vlv_iosf_sb_put() argument
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Dintel_dram.c120 skl_dram_get_dimm_info(struct drm_i915_private *i915, in skl_dram_get_dimm_info() argument
124 if (GRAPHICS_VER(i915) >= 11) { in skl_dram_get_dimm_info()
134 drm_dbg_kms(&i915->drm, in skl_dram_get_dimm_info()
141 skl_dram_get_channel_info(struct drm_i915_private *i915, in skl_dram_get_channel_info() argument
145 skl_dram_get_dimm_info(i915, &ch->dimm_l, in skl_dram_get_channel_info()
147 skl_dram_get_dimm_info(i915, &ch->dimm_s, in skl_dram_get_channel_info()
151 drm_dbg_kms(&i915->drm, "CH%u not populated\n", channel); in skl_dram_get_channel_info()
165 drm_dbg_kms(&i915->drm, "CH%u ranks: %u, 16Gb DIMMs: %s\n", in skl_dram_get_channel_info()
181 skl_dram_get_channels_info(struct drm_i915_private *i915) in skl_dram_get_channels_info() argument
183 struct dram_info *dram_info = &i915->dram_info; in skl_dram_get_channels_info()
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Di915_drv.c287 static void sanitize_gpu(struct drm_i915_private *i915) in sanitize_gpu() argument
289 if (!INTEL_INFO(i915)->gpu_reset_clobbers_display) in sanitize_gpu()
290 __intel_gt_reset(&i915->gt, ALL_ENGINES); in sanitize_gpu()
468 static int i915_set_dma_info(struct drm_i915_private *i915) in i915_set_dma_info() argument
470 unsigned int mask_size = INTEL_INFO(i915)->dma_mask_size; in i915_set_dma_info()
479 dma_set_max_seg_size(i915->drm.dev, UINT_MAX); in i915_set_dma_info()
481 ret = dma_set_mask(i915->drm.dev, DMA_BIT_MASK(mask_size)); in i915_set_dma_info()
486 if (GRAPHICS_VER(i915) == 2) in i915_set_dma_info()
498 if (IS_I965G(i915) || IS_I965GM(i915)) in i915_set_dma_info()
501 ret = dma_set_coherent_mask(i915->drm.dev, DMA_BIT_MASK(mask_size)); in i915_set_dma_info()
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Di915_switcheroo.c14 struct drm_i915_private *i915 = pdev_to_i915(pdev); in i915_switcheroo_set_state() local
17 if (!i915) { in i915_switcheroo_set_state()
23 drm_info(&i915->drm, "switched on\n"); in i915_switcheroo_set_state()
24 i915->drm.switch_power_state = DRM_SWITCH_POWER_CHANGING; in i915_switcheroo_set_state()
27 i915_resume_switcheroo(i915); in i915_switcheroo_set_state()
28 i915->drm.switch_power_state = DRM_SWITCH_POWER_ON; in i915_switcheroo_set_state()
30 drm_info(&i915->drm, "switched off\n"); in i915_switcheroo_set_state()
31 i915->drm.switch_power_state = DRM_SWITCH_POWER_CHANGING; in i915_switcheroo_set_state()
32 i915_suspend_switcheroo(i915, pmm); in i915_switcheroo_set_state()
33 i915->drm.switch_power_state = DRM_SWITCH_POWER_OFF; in i915_switcheroo_set_state()
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Di915_getparam.c14 struct drm_i915_private *i915 = to_i915(dev); in i915_getparam_ioctl() local
16 const struct sseu_dev_info *sseu = &i915->gt.info.sseu; in i915_getparam_ioctl()
34 value = i915->ggtt.num_fences; in i915_getparam_ioctl()
37 value = !!i915->overlay; in i915_getparam_ioctl()
40 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
44 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
48 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
52 value = !!intel_engine_lookup_user(i915, in i915_getparam_ioctl()
56 value = HAS_LLC(i915); in i915_getparam_ioctl()
59 value = HAS_WT(i915); in i915_getparam_ioctl()
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Dintel_wopcm.c79 struct drm_i915_private *i915 = wopcm_to_i915(wopcm); in intel_wopcm_init_early() local
81 if (!HAS_GT_UC(i915)) in intel_wopcm_init_early()
84 if (GRAPHICS_VER(i915) >= 11) in intel_wopcm_init_early()
89 drm_dbg(&i915->drm, "WOPCM: %uK\n", wopcm->size / 1024); in intel_wopcm_init_early()
92 static u32 context_reserved_size(struct drm_i915_private *i915) in context_reserved_size() argument
94 if (IS_GEN9_LP(i915)) in context_reserved_size()
96 else if (GRAPHICS_VER(i915) >= 11) in context_reserved_size()
102 static bool gen9_check_dword_gap(struct drm_i915_private *i915, in gen9_check_dword_gap() argument
115 drm_err(&i915->drm, in gen9_check_dword_gap()
125 static bool gen9_check_huc_fw_fits(struct drm_i915_private *i915, in gen9_check_huc_fw_fits() argument
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Di915_pmu.c107 struct drm_i915_private *i915 = container_of(pmu, typeof(*i915), pmu); in pmu_needs_timer() local
135 else if (i915->caps.scheduler & I915_SCHEDULER_CAP_ENGINE_BUSY_STATS) in pmu_needs_timer()
146 struct drm_i915_private *i915 = gt->i915; in __get_rc6() local
150 IS_VALLEYVIEW(i915) ? in __get_rc6()
154 if (HAS_RC6p(i915)) in __get_rc6()
157 if (HAS_RC6pp(i915)) in __get_rc6()
170 struct drm_i915_private *i915 = gt->i915; in get_rc6() local
171 struct i915_pmu *pmu = &i915->pmu; in get_rc6()
210 struct drm_i915_private *i915 = container_of(pmu, typeof(*i915), pmu); in init_rc6() local
213 with_intel_runtime_pm(i915->gt.uncore->rpm, wakeref) { in init_rc6()
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/Linux-v5.15/drivers/gpu/drm/i915/display/
Dintel_bios.c63 struct drm_i915_private *i915; member
216 parse_panel_options(struct drm_i915_private *i915, in parse_panel_options() argument
228 i915->vbt.lvds_dither = lvds_options->pixel_dither; in parse_panel_options()
230 ret = intel_opregion_get_panel_type(i915); in parse_panel_options()
232 drm_WARN_ON(&i915->drm, ret > 0xf); in parse_panel_options()
234 drm_dbg_kms(&i915->drm, "Panel type: %d (OpRegion)\n", in parse_panel_options()
238 drm_dbg_kms(&i915->drm, in parse_panel_options()
244 drm_dbg_kms(&i915->drm, "Panel type: %d (VBT)\n", in parse_panel_options()
248 i915->vbt.panel_type = panel_type; in parse_panel_options()
259 i915->vbt.drrs_type = STATIC_DRRS_SUPPORT; in parse_panel_options()
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Dintel_frontbuffer.c79 static void frontbuffer_flush(struct drm_i915_private *i915, in frontbuffer_flush() argument
84 spin_lock(&i915->fb_tracking.lock); in frontbuffer_flush()
85 frontbuffer_bits &= ~i915->fb_tracking.busy_bits; in frontbuffer_flush()
86 spin_unlock(&i915->fb_tracking.lock); in frontbuffer_flush()
94 intel_edp_drrs_flush(i915, frontbuffer_bits); in frontbuffer_flush()
95 intel_psr_flush(i915, frontbuffer_bits, origin); in frontbuffer_flush()
96 intel_fbc_flush(i915, frontbuffer_bits, origin); in frontbuffer_flush()
111 void intel_frontbuffer_flip_prepare(struct drm_i915_private *i915, in intel_frontbuffer_flip_prepare() argument
114 spin_lock(&i915->fb_tracking.lock); in intel_frontbuffer_flip_prepare()
115 i915->fb_tracking.flip_bits |= frontbuffer_bits; in intel_frontbuffer_flip_prepare()
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Dintel_tc.c38 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in tc_cold_block() local
41 if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port) in tc_cold_block()
45 return intel_display_power_get(i915, domain); in tc_cold_block()
51 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in tc_cold_unblock() local
63 intel_display_power_put_async(i915, domain, wakeref); in tc_cold_unblock()
69 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in assert_tc_cold_blocked() local
72 if (DISPLAY_VER(i915) == 11 && !dig_port->tc_legacy_port) in assert_tc_cold_blocked()
75 enabled = intel_display_power_is_enabled(i915, in assert_tc_cold_blocked()
77 drm_WARN_ON(&i915->drm, !enabled); in assert_tc_cold_blocked()
82 struct drm_i915_private *i915 = to_i915(dig_port->base.base.dev); in intel_tc_port_get_lane_mask() local
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Dintel_quirks.c14 static void quirk_ssc_force_disable(struct drm_i915_private *i915) in quirk_ssc_force_disable() argument
16 i915->quirks |= QUIRK_LVDS_SSC_DISABLE; in quirk_ssc_force_disable()
17 drm_info(&i915->drm, "applying lvds SSC disable quirk\n"); in quirk_ssc_force_disable()
24 static void quirk_invert_brightness(struct drm_i915_private *i915) in quirk_invert_brightness() argument
26 i915->quirks |= QUIRK_INVERT_BRIGHTNESS; in quirk_invert_brightness()
27 drm_info(&i915->drm, "applying inverted panel brightness quirk\n"); in quirk_invert_brightness()
31 static void quirk_backlight_present(struct drm_i915_private *i915) in quirk_backlight_present() argument
33 i915->quirks |= QUIRK_BACKLIGHT_PRESENT; in quirk_backlight_present()
34 drm_info(&i915->drm, "applying backlight present quirk\n"); in quirk_backlight_present()
40 static void quirk_increase_t12_delay(struct drm_i915_private *i915) in quirk_increase_t12_delay() argument
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Dintel_vga.c15 static i915_reg_t intel_vga_cntrl_reg(struct drm_i915_private *i915) in intel_vga_cntrl_reg() argument
17 if (IS_VALLEYVIEW(i915) || IS_CHERRYVIEW(i915)) in intel_vga_cntrl_reg()
19 else if (DISPLAY_VER(i915) >= 5) in intel_vga_cntrl_reg()
58 void intel_vga_redisable(struct drm_i915_private *i915) in intel_vga_redisable() argument
71 wakeref = intel_display_power_get_if_enabled(i915, POWER_DOMAIN_VGA); in intel_vga_redisable()
75 intel_vga_redisable_power_on(i915); in intel_vga_redisable()
77 intel_display_power_put(i915, POWER_DOMAIN_VGA, wakeref); in intel_vga_redisable()
80 void intel_vga_reset_io_mem(struct drm_i915_private *i915) in intel_vga_reset_io_mem() argument
82 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); in intel_vga_reset_io_mem()
100 intel_vga_set_state(struct drm_i915_private *i915, bool enable_decode) in intel_vga_set_state() argument
[all …]
Dintel_de.h15 intel_de_read(struct drm_i915_private *i915, i915_reg_t reg) in intel_de_read() argument
17 return intel_uncore_read(&i915->uncore, reg); in intel_de_read()
21 intel_de_posting_read(struct drm_i915_private *i915, i915_reg_t reg) in intel_de_posting_read() argument
23 intel_uncore_posting_read(&i915->uncore, reg); in intel_de_posting_read()
27 intel_de_write(struct drm_i915_private *i915, i915_reg_t reg, u32 val) in intel_de_write() argument
29 intel_uncore_write(&i915->uncore, reg, val); in intel_de_write()
33 intel_de_rmw(struct drm_i915_private *i915, i915_reg_t reg, u32 clear, u32 set) in intel_de_rmw() argument
35 intel_uncore_rmw(&i915->uncore, reg, clear, set); in intel_de_rmw()
39 intel_de_wait_for_register(struct drm_i915_private *i915, i915_reg_t reg, in intel_de_wait_for_register() argument
42 return intel_wait_for_register(&i915->uncore, reg, mask, value, timeout); in intel_de_wait_for_register()
[all …]
/Linux-v5.15/drivers/gpu/drm/i915/gem/
Di915_gem_stolen.c31 int i915_gem_stolen_insert_node_in_range(struct drm_i915_private *i915, in i915_gem_stolen_insert_node_in_range() argument
37 if (!drm_mm_initialized(&i915->mm.stolen)) in i915_gem_stolen_insert_node_in_range()
41 if (GRAPHICS_VER(i915) >= 8 && start < 4096) in i915_gem_stolen_insert_node_in_range()
44 mutex_lock(&i915->mm.stolen_lock); in i915_gem_stolen_insert_node_in_range()
45 ret = drm_mm_insert_node_in_range(&i915->mm.stolen, node, in i915_gem_stolen_insert_node_in_range()
48 mutex_unlock(&i915->mm.stolen_lock); in i915_gem_stolen_insert_node_in_range()
53 int i915_gem_stolen_insert_node(struct drm_i915_private *i915, in i915_gem_stolen_insert_node() argument
57 return i915_gem_stolen_insert_node_in_range(i915, node, in i915_gem_stolen_insert_node()
63 void i915_gem_stolen_remove_node(struct drm_i915_private *i915, in i915_gem_stolen_remove_node() argument
66 mutex_lock(&i915->mm.stolen_lock); in i915_gem_stolen_remove_node()
[all …]
Di915_gem_shrinker.c102 struct drm_i915_private *i915, in i915_gem_shrink() argument
111 { &i915->mm.purge_list, ~0u }, in i915_gem_shrink()
113 &i915->mm.shrink_list, in i915_gem_shrink()
124 bool trylock_vm = !ww && intel_vm_no_concurrent_access_wa(i915); in i915_gem_shrink()
126 trace_i915_gem_shrink(i915, target, shrink); in i915_gem_shrink()
134 wakeref = intel_runtime_pm_get_if_in_use(&i915->runtime_pm); in i915_gem_shrink()
151 intel_gt_retire_requests(&i915->gt); in i915_gem_shrink()
189 spin_lock_irqsave(&i915->mm.obj_lock, flags); in i915_gem_shrink()
210 spin_unlock_irqrestore(&i915->mm.obj_lock, flags); in i915_gem_shrink()
238 spin_lock_irqsave(&i915->mm.obj_lock, flags); in i915_gem_shrink()
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Di915_gem_pm.c21 void i915_gem_suspend(struct drm_i915_private *i915) in i915_gem_suspend() argument
23 GEM_TRACE("%s\n", dev_name(i915->drm.dev)); in i915_gem_suspend()
25 intel_wakeref_auto(&i915->ggtt.userfault_wakeref, 0); in i915_gem_suspend()
26 flush_workqueue(i915->wq); in i915_gem_suspend()
37 intel_gt_suspend_prepare(&i915->gt); in i915_gem_suspend()
39 i915_gem_drain_freed_objects(i915); in i915_gem_suspend()
42 void i915_gem_suspend_late(struct drm_i915_private *i915) in i915_gem_suspend_late() argument
46 &i915->mm.shrink_list, in i915_gem_suspend_late()
47 &i915->mm.purge_list, in i915_gem_suspend_late()
73 intel_gt_suspend_late(&i915->gt); in i915_gem_suspend_late()
[all …]
/Linux-v5.15/drivers/gpu/drm/i915/gt/
Dintel_workarounds.c283 struct drm_i915_private *i915 = engine->i915; in bdw_ctx_workarounds_init() local
305 (IS_BDW_GT3(i915) ? HDC_FENCE_DEST_SLM_DISABLE : 0)); in bdw_ctx_workarounds_init()
323 struct drm_i915_private *i915 = engine->i915; in gen9_ctx_workarounds_init() local
325 if (HAS_LLC(i915)) { in gen9_ctx_workarounds_init()
382 if (IS_SKYLAKE(i915) || in gen9_ctx_workarounds_init()
383 IS_KABYLAKE(i915) || in gen9_ctx_workarounds_init()
384 IS_COFFEELAKE(i915) || in gen9_ctx_workarounds_init()
385 IS_COMETLAKE(i915)) in gen9_ctx_workarounds_init()
412 if (IS_GEN9_LP(i915)) in gen9_ctx_workarounds_init()
480 struct drm_i915_private *i915 = engine->i915; in kbl_ctx_workarounds_init() local
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Dintel_rps.c32 return rps_to_gt(rps)->i915; in rps_to_i915()
215 if (GRAPHICS_VER(gt->i915) >= 11) in rps_reset_interrupts()
235 intel_synchronize_irq(gt->i915); in rps_disable_interrupts()
265 struct drm_i915_private *i915 = rps_to_i915(rps); in gen5_rps_init() local
271 if (i915->fsb_freq <= 3200) in gen5_rps_init()
273 else if (i915->fsb_freq <= 4800) in gen5_rps_init()
279 if (cparams[i].i == c_m && cparams[i].t == i915->mem_freq) { in gen5_rps_init()
293 drm_dbg(&i915->drm, "fmax: %d, fmin: %d, fstart: %d\n", in gen5_rps_init()
364 static u32 pvid_to_extvid(struct drm_i915_private *i915, u8 pxvid) in pvid_to_extvid() argument
368 if (INTEL_INFO(i915)->is_mobile) in pvid_to_extvid()
[all …]
Dintel_region_lmem.c17 struct drm_i915_private *i915 = mem->i915; in init_fake_lmem_bar() local
18 struct i915_ggtt *ggtt = &i915->ggtt; in init_fake_lmem_bar()
32 mem->remap_addr = dma_map_resource(i915->drm.dev, in init_fake_lmem_bar()
37 if (dma_mapping_error(i915->drm.dev, mem->remap_addr)) { in init_fake_lmem_bar()
62 dma_unmap_resource(mem->i915->drm.dev, in release_fake_lmem_bar()
82 if (mem->i915->params.fake_lmem_start) { in region_lmem_init()
117 struct drm_i915_private *i915 = gt->i915; in intel_gt_setup_fake_lmem() local
118 struct pci_dev *pdev = to_pci_dev(i915->drm.dev); in intel_gt_setup_fake_lmem()
124 if (!HAS_LMEM(i915)) in intel_gt_setup_fake_lmem()
127 if (!i915->params.fake_lmem_start) in intel_gt_setup_fake_lmem()
[all …]
Dintel_rc6.c48 return rc6_to_gt(rc)->i915; in rc6_to_i915()
125 if (GRAPHICS_VER(gt->i915) >= 12) { in gen11_rc6_enable()
230 struct drm_i915_private *i915 = rc6_to_i915(rc6); in gen6_rc6_enable() local
253 if (HAS_RC6p(i915)) in gen6_rc6_enable()
255 if (HAS_RC6pp(i915)) in gen6_rc6_enable()
263 ret = sandybridge_pcode_read(i915, GEN6_PCODE_READ_RC6VIDS, in gen6_rc6_enable()
265 if (GRAPHICS_VER(i915) == 6 && ret) { in gen6_rc6_enable()
266 drm_dbg(&i915->drm, "Couldn't check for BIOS workaround\n"); in gen6_rc6_enable()
267 } else if (GRAPHICS_VER(i915) == 6 && in gen6_rc6_enable()
269 drm_dbg(&i915->drm, in gen6_rc6_enable()
[all …]
/Linux-v5.15/drivers/gpu/drm/i915/gt/uc/
Dintel_uc.c20 struct drm_i915_private *i915 = uc_to_gt(uc)->i915; in uc_expand_default_options() local
22 if (i915->params.enable_guc != -1) in uc_expand_default_options()
26 if (GRAPHICS_VER(i915) < 12) { in uc_expand_default_options()
27 i915->params.enable_guc = 0; in uc_expand_default_options()
32 if (IS_TIGERLAKE(i915) || IS_ROCKETLAKE(i915)) { in uc_expand_default_options()
33 i915->params.enable_guc = 0; in uc_expand_default_options()
38 if (IS_DG1(i915) || IS_ALDERLAKE_S(i915)) { in uc_expand_default_options()
39 i915->params.enable_guc = ENABLE_GUC_LOAD_HUC; in uc_expand_default_options()
44 i915->params.enable_guc = ENABLE_GUC_LOAD_HUC | ENABLE_GUC_SUBMISSION; in uc_expand_default_options()
55 ret = i915_inject_probe_error(gt->i915, -ENXIO); in __intel_uc_reset_hw()
[all …]
/Linux-v5.15/drivers/gpu/drm/i915/gem/selftests/
Di915_gem_mman.c274 setup_tile_size(struct tile *tile, struct drm_i915_private *i915) in setup_tile_size() argument
276 if (GRAPHICS_VER(i915) <= 2) { in setup_tile_size()
281 HAS_128_BYTE_Y_TILING(i915)) { in setup_tile_size()
291 if (GRAPHICS_VER(i915) < 4) in setup_tile_size()
293 else if (GRAPHICS_VER(i915) < 7) in setup_tile_size()
302 struct drm_i915_private *i915 = arg; in igt_partial_tiling() local
308 if (!i915_ggtt_has_aperture(&i915->ggtt)) in igt_partial_tiling()
319 obj = huge_gem_object(i915, in igt_partial_tiling()
321 (1 + next_prime_number(i915->ggtt.vm.total >> PAGE_SHIFT)) << PAGE_SHIFT); in igt_partial_tiling()
332 wakeref = intel_runtime_pm_get(&i915->runtime_pm); in igt_partial_tiling()
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