Searched refs:hccr (Results 1 – 10 of 10) sorted by relevance
| /Linux-v5.15/drivers/scsi/qla2xxx/ |
| D | qla_dbg.c | 139 wrt_reg_dword(®->hccr, HCCRX_SET_HOST_INT); in qla27xx_dump_mpi_ram()
158 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); in qla27xx_dump_mpi_ram()
159 rd_reg_dword(®->hccr); in qla27xx_dump_mpi_ram()
165 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); in qla27xx_dump_mpi_ram()
166 rd_reg_dword(®->hccr); in qla27xx_dump_mpi_ram()
225 wrt_reg_dword(®->hccr, HCCRX_SET_HOST_INT); in qla24xx_dump_ram()
241 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); in qla24xx_dump_ram()
242 rd_reg_dword(®->hccr); in qla24xx_dump_ram()
248 wrt_reg_dword(®->hccr, HCCRX_CLR_RISC_INT); in qla24xx_dump_ram()
249 rd_reg_dword(®->hccr); in qla24xx_dump_ram()
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| D | qla_isr.c | 332 uint16_t hccr; in qla2100_intr_handler() local
351 hccr = rd_reg_word(®->hccr); in qla2100_intr_handler()
352 if (qla2x00_check_reg16_for_disconnect(vha, hccr)) in qla2100_intr_handler()
354 if (hccr & HCCR_RISC_PAUSE) { in qla2100_intr_handler()
363 wrt_reg_word(®->hccr, HCCR_RESET_RISC); in qla2100_intr_handler()
364 rd_reg_word(®->hccr); in qla2100_intr_handler()
373 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT); in qla2100_intr_handler()
374 rd_reg_word(®->hccr); in qla2100_intr_handler()
398 wrt_reg_word(®->hccr, HCCR_CLR_RISC_INT); in qla2100_intr_handler()
399 rd_reg_word(®->hccr); in qla2100_intr_handler()
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| D | qla_init.c | 2544 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); in qla2300_pci_config()
2546 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) != 0) in qla2300_pci_config()
2567 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); in qla2300_pci_config()
2569 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) == 0) in qla2300_pci_config()
2732 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); in qla2x00_reset_chip()
2735 if ((rd_reg_word(®->hccr) & in qla2x00_reset_chip()
2741 rd_reg_word(®->hccr); /* PCI Posting. */ in qla2x00_reset_chip()
2783 wrt_reg_word(®->hccr, HCCR_RESET_RISC); in qla2x00_reset_chip()
2784 rd_reg_word(®->hccr); /* PCI Posting. */ in qla2x00_reset_chip()
2787 wrt_reg_word(®->hccr, HCCR_RELEASE_RISC); in qla2x00_reset_chip()
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| D | qla_dbg.h | 14 __be16 hccr; member
38 __be16 hccr; member
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| D | qla_mbx.c | 262 wrt_reg_dword(®->isp24.hccr, HCCRX_SET_HOST_INT); in qla2x00_mailbox_command()
264 wrt_reg_word(®->isp.hccr, HCCR_SET_HOST_INT); in qla2x00_mailbox_command()
325 wrt_reg_dword(®->isp24.hccr, HCCRX_SET_HOST_INT); in qla2x00_mailbox_command()
327 wrt_reg_word(®->isp.hccr, HCCR_SET_HOST_INT); in qla2x00_mailbox_command()
415 uint32_t ictrl, host_status, hccr; in qla2x00_mailbox_command() local
426 hccr = rd_reg_dword(®->isp24.hccr); in qla2x00_mailbox_command()
432 mb[7], host_status, hccr); in qla2x00_mailbox_command()
5508 wrt_reg_dword(®->hccr, HCCRX_SET_HOST_INT); in qla81xx_write_mpi_register()
5522 wrt_reg_dword(®->hccr, in qla81xx_write_mpi_register()
5524 rd_reg_dword(®->hccr); in qla81xx_write_mpi_register()
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| D | qla_sup.c | 2323 wrt_reg_word(®->hccr, HCCR_PAUSE_RISC); in qla2x00_suspend_hba()
2324 rd_reg_word(®->hccr); in qla2x00_suspend_hba()
2327 if ((rd_reg_word(®->hccr) & HCCR_RISC_PAUSE) != 0) in qla2x00_suspend_hba()
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| D | qla_fw.h | 1226 __le32 hccr; /* Host command & control register. */ member
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| D | qla_def.h | 863 __le16 hccr; /* Host command & control register. */ member
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| D | qla_iocb.c | 479 rd_reg_dword_relaxed(&ha->iobase->isp24.hccr); in qla2x00_start_iocbs()
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| D | qla_os.c | 7705 stat = rd_reg_word(®->hccr); in qla2xxx_pci_mmio_enabled()
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