Searched refs:gfxclk (Results 1 – 15 of 15) sorted by relevance
100 static int gfxclk; /* force FBI freq in Mhz . Dangerous */ variable1193 if ((gfxclk >10 ) && (gfxclk < spec->max_gfxclk)) { in sst_init()1194 printk(KERN_INFO "sstfb: Using supplied graphic freq : %dMHz\n", gfxclk); in sst_init()1195 gfx_clock = gfxclk *1000; in sst_init()1196 } else if (gfxclk) { in sst_init()1197 printk(KERN_WARNING "sstfb: %dMhz is way out of spec! Using default\n", gfxclk); in sst_init()1302 gfxclk = simple_strtoul (this_opt+7, NULL, 0); in sstfb_setup()1527 module_param(gfxclk, int, 0);1528 MODULE_PARM_DESC(gfxclk, "Force graphic chip frequency in MHz. DANGEROUS. (default=auto)");
337 smu->smu_table.boot_values.gfxclk = v_3_1->bootup_sclk_in10khz; in smu_v12_0_get_vbios_bootup_values()354 smu->smu_table.boot_values.gfxclk = v_3_3->bootup_sclk_in10khz; in smu_v12_0_get_vbios_bootup_values()
288 clock_limit = smu->smu_table.boot_values.gfxclk; in renoir_get_dpm_ultimate_freq()
123 gfxclk=x gfxclk:x Force graphic clock frequency (in MHz).
534 smu->smu_table.boot_values.gfxclk = v_3_1->bootup_sclk_in10khz; in smu_v13_0_get_vbios_bootup_values()548 smu->smu_table.boot_values.gfxclk = v_3_3->bootup_sclk_in10khz; in smu_v13_0_get_vbios_bootup_values()563 smu->smu_table.boot_values.gfxclk = v_3_4->bootup_sclk_in10khz; in smu_v13_0_get_vbios_bootup_values()1492 clock_limit = smu->smu_table.boot_values.gfxclk; in smu_v13_0_get_dpm_ultimate_freq()
914 clock_limit = smu->smu_table.boot_values.gfxclk; in yellow_carp_get_dpm_ultimate_freq()
327 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100; in aldebaran_set_default_dpm_table()
573 smu->smu_table.boot_values.gfxclk = v_3_1->bootup_sclk_in10khz; in smu_v11_0_get_vbios_bootup_values()590 smu->smu_table.boot_values.gfxclk = v_3_3->bootup_sclk_in10khz; in smu_v11_0_get_vbios_bootup_values()1741 clock_limit = smu->smu_table.boot_values.gfxclk; in smu_v11_0_get_dpm_ultimate_freq()
909 clock_limit = smu->smu_table.boot_values.gfxclk; in vangogh_get_dpm_ultimate_freq()
376 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100; in arcturus_set_default_dpm_table()
1015 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100; in navi10_set_default_dpm_table()
707 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.gfxclk / 100; in sienna_cichlid_set_default_dpm_table()
291 uint32_t gfxclk; member
526 uint32_t gfxclk; member
838 limits->gfxclk = le32_to_cpu(limit_table->entries[0].ulGFXCLKLimit); in get_hard_limits()
