Home
last modified time | relevance | path

Searched refs:gen_synth0_1_parents (Results 1 – 2 of 2) sorted by relevance

/Linux-v5.15/drivers/clk/spear/
Dspear1340_clock.c438 static const char *gen_synth0_1_parents[] = { "vco1div4_clk", "vco3div2_clk", variable
894 clk = clk_register_mux(NULL, "gen_syn0_1_mclk", gen_synth0_1_parents, in spear1340_clk_init()
895 ARRAY_SIZE(gen_synth0_1_parents), in spear1340_clk_init()
Dspear1310_clock.c371 static const char *gen_synth0_1_parents[] = { "vco1div4_clk", "vco3div2_clk", variable
809 clk = clk_register_mux(NULL, "gen_syn0_1_mclk", gen_synth0_1_parents, in spear1310_clk_init()
810 ARRAY_SIZE(gen_synth0_1_parents), in spear1310_clk_init()