Searched refs:fifo_ctrl (Results 1 – 7 of 7) sorted by relevance
35 int (*fifo_ctrl)(struct dvb_frontend *fe, int onoff); member
770 xfer_ops->fifo_ctrl = dib3000mb_fifo_control; in dib3000mb_attach()
111 unsigned int fifo_ctrl; member377 tdma_ch_write(tdc, ADMA_CH_FIFO_CTRL, ch_regs->fifo_ctrl); in tegra_adma_start()601 ch_regs->fifo_ctrl = cdata->ch_fifo_ctrl; in tegra_adma_set_xfer_params()733 ch_reg->fifo_ctrl = tdma_ch_read(tdc, ADMA_CH_FIFO_CTRL); in tegra_adma_runtime_suspend()770 tdma_ch_write(tdc, ADMA_CH_FIFO_CTRL, ch_reg->fifo_ctrl); in tegra_adma_runtime_resume()
77 u32 fifo_ctrl; /* LPC RX/TX FIFO Control Register */ member
26 if (st->ops.fifo_ctrl != NULL) in dibusb_streaming_ctrl()27 if (st->ops.fifo_ctrl(adap->fe_adap[0].fe, onoff)) { in dibusb_streaming_ctrl()
280 out_be32(&lpbfifo.regs->fifo_ctrl, MPC512X_SCLPC_FIFO_CTRL(0x7)); in mpc512x_lpbfifo_kick()
2629 unsigned fifo_ctrl; in evergreen_blank_dp_output() local2659 fifo_ctrl = RREG32(EVERGREEN_DP_STEER_FIFO + evergreen_dp_offsets[dig_fe]); in evergreen_blank_dp_output()2660 fifo_ctrl |= EVERGREEN_DP_STEER_FIFO_RESET; in evergreen_blank_dp_output()2661 WREG32(EVERGREEN_DP_STEER_FIFO + evergreen_dp_offsets[dig_fe], fifo_ctrl); in evergreen_blank_dp_output()
