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Searched refs:feature_mask (Results 1 – 25 of 46) sorted by relevance

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/Linux-v5.15/drivers/gpu/drm/amd/pm/swsmu/
Dsmu_cmn.c529 uint32_t *feature_mask, in smu_cmn_get_enabled_mask() argument
536 if (!feature_mask || num < 2) in smu_cmn_get_enabled_mask()
548 feature_mask[0] = feature_mask_low; in smu_cmn_get_enabled_mask()
549 feature_mask[1] = feature_mask_high; in smu_cmn_get_enabled_mask()
551 bitmap_copy((unsigned long *)feature_mask, feature->enabled, in smu_cmn_get_enabled_mask()
559 uint32_t *feature_mask, in smu_cmn_get_enabled_32_bits_mask() argument
567 if (!feature_mask || num < 2) in smu_cmn_get_enabled_32_bits_mask()
583 feature_mask[0] = feature_mask_en_low; in smu_cmn_get_enabled_32_bits_mask()
584 feature_mask[1] = feature_mask_en_high; in smu_cmn_get_enabled_32_bits_mask()
587 bitmap_copy((unsigned long *)feature_mask, feature->enabled, in smu_cmn_get_enabled_32_bits_mask()
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Dsmu_cmn.h57 uint32_t *feature_mask,
61 uint32_t *feature_mask,
69 uint64_t feature_mask,
Dsmu_internal.h72 …e smu_get_allowed_feature_mask(smu, feature_mask, num) smu_ppt_funcs(get_allowed_feature_mask, 0,… argument
/Linux-v5.15/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dhwmgr.c102 hwmgr->feature_mask &= ~(PP_VBI_TIME_SUPPORT_MASK | in hwmgr_early_init()
113 hwmgr->feature_mask &= ~PP_GFXOFF_MASK; in hwmgr_early_init()
118 hwmgr->feature_mask &= ~PP_GFXOFF_MASK; in hwmgr_early_init()
123 hwmgr->feature_mask &= ~ (PP_VBI_TIME_SUPPORT_MASK | in hwmgr_early_init()
131 hwmgr->feature_mask &= ~PP_VBI_TIME_SUPPORT_MASK; in hwmgr_early_init()
136 hwmgr->feature_mask &= ~ (PP_VBI_TIME_SUPPORT_MASK | in hwmgr_early_init()
144 hwmgr->feature_mask &= ~(PP_UVD_HANDSHAKE_MASK); in hwmgr_early_init()
149 hwmgr->feature_mask &= ~(PP_UVD_HANDSHAKE_MASK); in hwmgr_early_init()
160 hwmgr->feature_mask &= ~PP_GFXOFF_MASK; in hwmgr_early_init()
170 hwmgr->feature_mask &= ~PP_GFXOFF_MASK; in hwmgr_early_init()
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Dvega10_hwmgr.c121 hwmgr->feature_mask & PP_SCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
123 hwmgr->feature_mask & PP_SOCCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
125 hwmgr->feature_mask & PP_MCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
127 hwmgr->feature_mask & PP_PCIE_DPM_MASK ? false : true; in vega10_set_default_registry_data()
130 hwmgr->feature_mask & PP_DCEFCLK_DPM_MASK ? false : true; in vega10_set_default_registry_data()
132 if (hwmgr->feature_mask & PP_POWER_CONTAINMENT_MASK) { in vega10_set_default_registry_data()
139 hwmgr->feature_mask & PP_CLOCK_STRETCH_MASK ? true : false; in vega10_set_default_registry_data()
142 hwmgr->feature_mask & PP_ULV_MASK ? true : false; in vega10_set_default_registry_data()
145 hwmgr->feature_mask & PP_SCLK_DEEP_SLEEP_MASK ? true : false; in vega10_set_default_registry_data()
154 hwmgr->feature_mask & PP_AVFS_MASK ? true : false; in vega10_set_default_registry_data()
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Dvega20_hwmgr.c104 if (!(hwmgr->feature_mask & PP_PCIE_DPM_MASK)) in vega20_set_default_registry_data()
107 if (!(hwmgr->feature_mask & PP_SCLK_DPM_MASK)) in vega20_set_default_registry_data()
110 if (!(hwmgr->feature_mask & PP_SOCCLK_DPM_MASK)) in vega20_set_default_registry_data()
113 if (!(hwmgr->feature_mask & PP_MCLK_DPM_MASK)) in vega20_set_default_registry_data()
116 if (!(hwmgr->feature_mask & PP_DCEFCLK_DPM_MASK)) in vega20_set_default_registry_data()
119 if (!(hwmgr->feature_mask & PP_ULV_MASK)) in vega20_set_default_registry_data()
122 if (!(hwmgr->feature_mask & PP_SCLK_DEEP_SLEEP_MASK)) in vega20_set_default_registry_data()
174 data->registry_data.pcie_dpm_key_disabled = !(hwmgr->feature_mask & PP_PCIE_DPM_MASK); in vega20_set_default_registry_data()
1816 static int vega20_upload_dpm_min_level(struct pp_hwmgr *hwmgr, uint32_t feature_mask) in vega20_upload_dpm_min_level() argument
1824 (feature_mask & FEATURE_DPM_GFXCLK_MASK)) { in vega20_upload_dpm_min_level()
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/Linux-v5.15/drivers/thermal/intel/int340x_thermal/
Dprocessor_thermal_device.c381 kernel_ulong_t feature_mask) in proc_thermal_mmio_add() argument
385 proc_priv->mmio_feature_mask = feature_mask; in proc_thermal_mmio_add()
387 if (feature_mask) { in proc_thermal_mmio_add()
393 if (feature_mask & PROC_THERMAL_FEATURE_RAPL) { in proc_thermal_mmio_add()
401 if (feature_mask & PROC_THERMAL_FEATURE_FIVR || in proc_thermal_mmio_add()
402 feature_mask & PROC_THERMAL_FEATURE_DVFS) { in proc_thermal_mmio_add()
410 if (feature_mask & PROC_THERMAL_FEATURE_MBOX) { in proc_thermal_mmio_add()
Dprocessor_thermal_device.h89 kernel_ulong_t feature_mask);
/Linux-v5.15/arch/arm64/kernel/
Dalternative.c137 unsigned long *feature_mask) in __apply_alternatives() argument
146 if (!test_bit(alt->cpufeature, feature_mask)) in __apply_alternatives()
189 feature_mask, ARM64_NCAPS); in __apply_alternatives()
/Linux-v5.15/drivers/mfd/
Dkempld-core.c67 pld->feature_mask = kempld_read16(pld, KEMPLD_FEATURE); in kempld_get_info_generic()
69 pld->feature_mask = 0; in kempld_get_info_generic()
97 if (pld->feature_mask & KEMPLD_FEATURE_BIT_I2C) in kempld_register_cells_generic()
100 if (pld->feature_mask & KEMPLD_FEATURE_BIT_WATCHDOG) in kempld_register_cells_generic()
103 if (pld->feature_mask & KEMPLD_FEATURE_BIT_GPIO) in kempld_register_cells_generic()
106 if (pld->feature_mask & KEMPLD_FEATURE_MASK_UART) in kempld_register_cells_generic()
/Linux-v5.15/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dcyan_skillfish_ppt.c360 uint32_t feature_mask[2]; in cyan_skillfish_is_dpm_running() local
367 ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2); in cyan_skillfish_is_dpm_running()
372 feature_enabled = (uint64_t)feature_mask[0] | in cyan_skillfish_is_dpm_running()
373 ((uint64_t)feature_mask[1] << 32); in cyan_skillfish_is_dpm_running()
Dnavi10_ppt.c280 uint32_t *feature_mask, uint32_t num) in navi10_get_allowed_feature_mask() argument
287 memset(feature_mask, 0, sizeof(uint32_t) * num); in navi10_get_allowed_feature_mask()
289 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) in navi10_get_allowed_feature_mask()
311 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); in navi10_get_allowed_feature_mask()
314 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_LINK_BIT); in navi10_get_allowed_feature_mask()
317 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT); in navi10_get_allowed_feature_mask()
320 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_ULV_BIT); in navi10_get_allowed_feature_mask()
323 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DS_GFXCLK_BIT); in navi10_get_allowed_feature_mask()
326 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFXOFF_BIT); in navi10_get_allowed_feature_mask()
329 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_MMHUB_PG_BIT); in navi10_get_allowed_feature_mask()
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Darcturus_ppt.c328 uint32_t *feature_mask, uint32_t num) in arcturus_get_allowed_feature_mask() argument
334 memset(feature_mask, 0xFF, sizeof(uint32_t) * num); in arcturus_get_allowed_feature_mask()
952 uint32_t feature_mask, in arcturus_upload_dpm_level() argument
961 (feature_mask & FEATURE_DPM_GFXCLK_MASK)) { in arcturus_upload_dpm_level()
975 (feature_mask & FEATURE_DPM_UCLK_MASK)) { in arcturus_upload_dpm_level()
989 (feature_mask & FEATURE_DPM_SOCCLK_MASK)) { in arcturus_upload_dpm_level()
2038 uint32_t feature_mask[2]; in arcturus_is_dpm_running() local
2041 ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2); in arcturus_is_dpm_running()
2045 feature_enabled = (uint64_t)feature_mask[1] << 32 | feature_mask[0]; in arcturus_is_dpm_running()
2272 uint32_t feature_mask; member
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Dsienna_cichlid_ppt.c265 uint32_t *feature_mask, uint32_t num) in sienna_cichlid_get_allowed_feature_mask() argument
272 memset(feature_mask, 0, sizeof(uint32_t) * num); in sienna_cichlid_get_allowed_feature_mask()
274 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_PREFETCHER_BIT) in sienna_cichlid_get_allowed_feature_mask()
296 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT); in sienna_cichlid_get_allowed_feature_mask()
297 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_GFX_GPO_BIT); in sienna_cichlid_get_allowed_feature_mask()
303 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_GFX_DCS_BIT); in sienna_cichlid_get_allowed_feature_mask()
306 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_UCLK_BIT) in sienna_cichlid_get_allowed_feature_mask()
311 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_LINK_BIT); in sienna_cichlid_get_allowed_feature_mask()
314 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_DCEFCLK_BIT); in sienna_cichlid_get_allowed_feature_mask()
317 *(uint64_t *)feature_mask |= FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT); in sienna_cichlid_get_allowed_feature_mask()
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/Linux-v5.15/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dvega10_smumgr.h46 bool enable, uint32_t feature_mask);
Dvega12_smumgr.h52 bool enable, uint64_t feature_mask);
Dvega20_smumgr.h51 bool enable, uint64_t feature_mask);
Dvega12_smumgr.c126 bool enable, uint64_t feature_mask) in vega12_enable_smc_features() argument
130 smu_features_low = (uint32_t)((feature_mask & SMU_FEATURES_LOW_MASK) >> SMU_FEATURES_LOW_SHIFT); in vega12_enable_smc_features()
131 smu_features_high = (uint32_t)((feature_mask & SMU_FEATURES_HIGH_MASK) >> SMU_FEATURES_HIGH_SHIFT); in vega12_enable_smc_features()
Dvega20_smumgr.c318 bool enable, uint64_t feature_mask) in vega20_enable_smc_features() argument
323 smu_features_low = (uint32_t)((feature_mask & SMU_FEATURES_LOW_MASK) >> SMU_FEATURES_LOW_SHIFT); in vega20_enable_smc_features()
324 smu_features_high = (uint32_t)((feature_mask & SMU_FEATURES_HIGH_MASK) >> SMU_FEATURES_HIGH_SHIFT); in vega20_enable_smc_features()
/Linux-v5.15/drivers/gpu/drm/amd/pm/swsmu/smu13/
Dyellow_carp_ppt.c209 uint32_t feature_mask[2]; in yellow_carp_system_features_control() local
221 ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2); in yellow_carp_system_features_control()
225 bitmap_copy(feature->enabled, (unsigned long *)&feature_mask, in yellow_carp_system_features_control()
227 bitmap_copy(feature->supported, (unsigned long *)&feature_mask, in yellow_carp_system_features_control()
267 uint32_t feature_mask[2]; in yellow_carp_is_dpm_running() local
270 ret = smu_cmn_get_enabled_32_bits_mask(smu, feature_mask, 2); in yellow_carp_is_dpm_running()
275 feature_enabled = (uint64_t)feature_mask[1] << 32 | feature_mask[0]; in yellow_carp_is_dpm_running()
Daldebaran_ppt.c280 uint32_t *feature_mask, uint32_t num) in aldebaran_get_allowed_feature_mask() argument
286 memset(feature_mask, 0xFF, sizeof(uint32_t) * num); in aldebaran_get_allowed_feature_mask()
928 uint32_t feature_mask, in aldebaran_upload_dpm_level() argument
937 (feature_mask & FEATURE_MASK(FEATURE_DPM_GFXCLK_BIT))) { in aldebaran_upload_dpm_level()
951 (feature_mask & FEATURE_MASK(FEATURE_DPM_UCLK_BIT))) { in aldebaran_upload_dpm_level()
965 (feature_mask & FEATURE_MASK(FEATURE_DPM_SOCCLK_BIT))) { in aldebaran_upload_dpm_level()
1456 uint32_t feature_mask[2]; in aldebaran_is_dpm_running() local
1459 ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2); in aldebaran_is_dpm_running()
1462 feature_enabled = (unsigned long)((uint64_t)feature_mask[0] | in aldebaran_is_dpm_running()
1463 ((uint64_t)feature_mask[1] << 32)); in aldebaran_is_dpm_running()
[all …]
Dsmu_v13_0.c715 uint32_t feature_mask[2]; in smu_v13_0_set_allowed_mask() local
721 bitmap_copy((unsigned long *)feature_mask, feature->allowed, 64); in smu_v13_0_set_allowed_mask()
724 feature_mask[1], NULL); in smu_v13_0_set_allowed_mask()
729 feature_mask[0], NULL); in smu_v13_0_set_allowed_mask()
763 uint32_t feature_mask[2]; in smu_v13_0_system_features_control() local
775 ret = smu_cmn_get_enabled_mask(smu, feature_mask, 2); in smu_v13_0_system_features_control()
779 bitmap_copy(feature->enabled, (unsigned long *)&feature_mask, in smu_v13_0_system_features_control()
781 bitmap_copy(feature->supported, (unsigned long *)&feature_mask, in smu_v13_0_system_features_control()
/Linux-v5.15/arch/x86/mm/
Dmem_encrypt_identity.c491 unsigned long feature_mask; in sme_enable() local
526 feature_mask = (sev_status & MSR_AMD64_SEV_ENABLED) ? AMD_SEV_BIT : AMD_SME_BIT; in sme_enable()
529 if (feature_mask == AMD_SME_BIT) { in sme_enable()
/Linux-v5.15/drivers/net/
Dtap.c924 netdev_features_t feature_mask = 0; in set_offload() local
933 feature_mask = NETIF_F_HW_CSUM; in set_offload()
937 feature_mask |= NETIF_F_TSO_ECN; in set_offload()
939 feature_mask |= NETIF_F_TSO; in set_offload()
941 feature_mask |= NETIF_F_TSO6; in set_offload()
953 if (feature_mask & (NETIF_F_TSO | NETIF_F_TSO6)) in set_offload()
961 tap->tap_features = feature_mask; in set_offload()
/Linux-v5.15/include/linux/mfd/
Dkempld.h91 u32 feature_mask; member

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