Searched refs:en_off (Results 1 – 1 of 1) sorted by relevance
40 u32 en_off; member163 enable_mask = DPU_REG_READ(&intr->hw, dpu_intr_set[reg_idx].en_off); in dpu_hw_intr_dispatch_irq()243 DPU_REG_WRITE(&intr->hw, reg->en_off, cache_irq_mask); in dpu_hw_intr_enable_irq_locked()290 DPU_REG_WRITE(&intr->hw, reg->en_off, cache_irq_mask); in dpu_hw_intr_disable_irq_locked()335 dpu_intr_set[i].en_off, 0x00000000); in dpu_hw_intr_disable_irqs()
