| /Linux-v5.15/drivers/gpu/drm/bridge/ |
| D | nwl-dsi.c | 128 static int nwl_dsi_clear_error(struct nwl_dsi *dsi) in nwl_dsi_clear_error() argument
130 int ret = dsi->error; in nwl_dsi_clear_error()
132 dsi->error = 0; in nwl_dsi_clear_error()
136 static void nwl_dsi_write(struct nwl_dsi *dsi, unsigned int reg, u32 val) in nwl_dsi_write() argument
140 if (dsi->error) in nwl_dsi_write()
143 ret = regmap_write(dsi->regmap, reg, val); in nwl_dsi_write()
145 DRM_DEV_ERROR(dsi->dev, in nwl_dsi_write()
148 dsi->error = ret; in nwl_dsi_write()
152 static u32 nwl_dsi_read(struct nwl_dsi *dsi, u32 reg) in nwl_dsi_read() argument
157 if (dsi->error) in nwl_dsi_read()
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| D | cdns-dsi.c | 507 static int cdns_dsi_mode2cfg(struct cdns_dsi *dsi, in cdns_dsi_mode2cfg() argument
512 struct cdns_dsi_output *output = &dsi->output; in cdns_dsi_mode2cfg()
553 static int cdns_dsi_adjust_phy_config(struct cdns_dsi *dsi, in cdns_dsi_adjust_phy_config() argument
559 struct cdns_dsi_output *output = &dsi->output; in cdns_dsi_adjust_phy_config()
602 static int cdns_dsi_check_conf(struct cdns_dsi *dsi, in cdns_dsi_check_conf() argument
607 struct cdns_dsi_output *output = &dsi->output; in cdns_dsi_check_conf()
613 ret = cdns_dsi_mode2cfg(dsi, mode, dsi_cfg, mode_valid_check); in cdns_dsi_check_conf()
621 ret = cdns_dsi_adjust_phy_config(dsi, dsi_cfg, phy_cfg, mode, mode_valid_check); in cdns_dsi_check_conf()
625 ret = phy_validate(dsi->dphy, PHY_MODE_MIPI_DPHY, 0, &output->phy_opts); in cdns_dsi_check_conf()
651 struct cdns_dsi *dsi = input_to_dsi(input); in cdns_dsi_bridge_attach() local
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| /Linux-v5.15/drivers/gpu/drm/bridge/synopsys/ |
| D | dw-mipi-dsi.c | 226 #define VPG_DEFS(name, dsi) \ argument
227 ((void __force *)&((*dsi).vpg_defs.name))
229 #define REGISTER(name, mask, dsi) \ argument
230 { #name, VPG_DEFS(name, dsi), mask, dsi }
236 struct dw_mipi_dsi *dsi; member
275 static inline bool dw_mipi_is_dual_mode(struct dw_mipi_dsi *dsi) in dw_mipi_is_dual_mode() argument
277 return dsi->slave || dsi->master; in dw_mipi_is_dual_mode()
303 static inline void dsi_write(struct dw_mipi_dsi *dsi, u32 reg, u32 val) in dsi_write() argument
305 writel(val, dsi->base + reg); in dsi_write()
308 static inline u32 dsi_read(struct dw_mipi_dsi *dsi, u32 reg) in dsi_read() argument
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| /Linux-v5.15/drivers/gpu/drm/mediatek/ |
| D | mtk_dsi.c | 220 static void mtk_dsi_mask(struct mtk_dsi *dsi, u32 offset, u32 mask, u32 data) in mtk_dsi_mask() argument
222 u32 temp = readl(dsi->regs + offset); in mtk_dsi_mask()
224 writel((temp & ~mask) | (data & mask), dsi->regs + offset); in mtk_dsi_mask()
227 static void mtk_dsi_phy_timconfig(struct mtk_dsi *dsi) in mtk_dsi_phy_timconfig() argument
230 u32 data_rate_mhz = DIV_ROUND_UP(dsi->data_rate, 1000000); in mtk_dsi_phy_timconfig()
231 struct mtk_phy_timing *timing = &dsi->phy_timing; in mtk_dsi_phy_timconfig()
259 writel(timcon0, dsi->regs + DSI_PHY_TIMECON0); in mtk_dsi_phy_timconfig()
260 writel(timcon1, dsi->regs + DSI_PHY_TIMECON1); in mtk_dsi_phy_timconfig()
261 writel(timcon2, dsi->regs + DSI_PHY_TIMECON2); in mtk_dsi_phy_timconfig()
262 writel(timcon3, dsi->regs + DSI_PHY_TIMECON3); in mtk_dsi_phy_timconfig()
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| /Linux-v5.15/drivers/gpu/drm/omapdrm/dss/ |
| D | dsi.c | 50 #define REG_GET(dsi, idx, start, end) \ argument
51 FLD_GET(dsi_read_reg(dsi, idx), start, end)
53 #define REG_FLD_MOD(dsi, idx, val, start, end) \ argument
54 dsi_write_reg(dsi, idx, FLD_MOD(dsi_read_reg(dsi, idx), val, start, end))
56 static int dsi_init_dispc(struct dsi_data *dsi);
57 static void dsi_uninit_dispc(struct dsi_data *dsi);
59 static int dsi_vc_send_null(struct dsi_data *dsi, int vc, int channel);
61 static ssize_t _omap_dsi_host_transfer(struct dsi_data *dsi, int vc,
86 static inline void dsi_write_reg(struct dsi_data *dsi, in dsi_write_reg() argument
92 case DSI_PROTO: base = dsi->proto_base; break; in dsi_write_reg()
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| /Linux-v5.15/drivers/gpu/drm/rockchip/ |
| D | dw-mipi-dsi-rockchip.c | 334 static inline void dsi_write(struct dw_mipi_dsi_rockchip *dsi, u32 reg, u32 val) in dsi_write() argument
336 writel(val, dsi->base + reg); in dsi_write()
339 static inline u32 dsi_read(struct dw_mipi_dsi_rockchip *dsi, u32 reg) in dsi_read() argument
341 return readl(dsi->base + reg); in dsi_read()
344 static inline void dsi_update_bits(struct dw_mipi_dsi_rockchip *dsi, u32 reg, in dsi_update_bits() argument
347 dsi_write(dsi, reg, (dsi_read(dsi, reg) & ~mask) | val); in dsi_update_bits()
350 static void dw_mipi_dsi_phy_write(struct dw_mipi_dsi_rockchip *dsi, in dw_mipi_dsi_phy_write() argument
359 dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_TESTCLK | PHY_UNTESTCLR); in dw_mipi_dsi_phy_write()
361 dsi_write(dsi, DSI_PHY_TST_CTRL1, PHY_TESTEN | PHY_TESTDOUT(0) | in dw_mipi_dsi_phy_write()
364 dsi_write(dsi, DSI_PHY_TST_CTRL0, PHY_UNTESTCLK | PHY_UNTESTCLR); in dw_mipi_dsi_phy_write()
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| /Linux-v5.15/drivers/gpu/drm/exynos/ |
| D | exynos_drm_dsi.c | 320 static inline void exynos_dsi_write(struct exynos_dsi *dsi, enum reg_idx idx, in exynos_dsi_write() argument
324 writel(val, dsi->reg_base + dsi->driver_data->reg_ofs[idx]); in exynos_dsi_write()
327 static inline u32 exynos_dsi_read(struct exynos_dsi *dsi, enum reg_idx idx) in exynos_dsi_read() argument
329 return readl(dsi->reg_base + dsi->driver_data->reg_ofs[idx]); in exynos_dsi_read()
522 static void exynos_dsi_wait_for_reset(struct exynos_dsi *dsi) in exynos_dsi_wait_for_reset() argument
524 if (wait_for_completion_timeout(&dsi->completed, msecs_to_jiffies(300))) in exynos_dsi_wait_for_reset()
527 dev_err(dsi->dev, "timeout waiting for reset\n"); in exynos_dsi_wait_for_reset()
530 static void exynos_dsi_reset(struct exynos_dsi *dsi) in exynos_dsi_reset() argument
532 u32 reset_val = dsi->driver_data->reg_values[RESET_TYPE]; in exynos_dsi_reset()
534 reinit_completion(&dsi->completed); in exynos_dsi_reset()
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| /Linux-v5.15/drivers/gpu/drm/tegra/ |
| D | dsi.c | 102 static struct tegra_dsi_state *tegra_dsi_get_state(struct tegra_dsi *dsi) in tegra_dsi_get_state() argument
104 return to_dsi_state(dsi->output.connector.state); in tegra_dsi_get_state()
107 static inline u32 tegra_dsi_readl(struct tegra_dsi *dsi, unsigned int offset) in tegra_dsi_readl() argument
109 u32 value = readl(dsi->regs + (offset << 2)); in tegra_dsi_readl()
111 trace_dsi_readl(dsi->dev, offset, value); in tegra_dsi_readl()
116 static inline void tegra_dsi_writel(struct tegra_dsi *dsi, u32 value, in tegra_dsi_writel() argument
119 trace_dsi_writel(dsi->dev, offset, value); in tegra_dsi_writel()
120 writel(value, dsi->regs + (offset << 2)); in tegra_dsi_writel()
202 struct tegra_dsi *dsi = node->info_ent->data; in tegra_dsi_show_regs() local
203 struct drm_crtc *crtc = dsi->output.encoder.crtc; in tegra_dsi_show_regs()
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| /Linux-v5.15/drivers/gpu/drm/panel/ |
| D | panel-asus-z00t-tm5p5-n35596.c | 16 struct mipi_dsi_device *dsi; member
27 #define dsi_generic_write_seq(dsi, seq...) do { \ argument
30 ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
35 #define dsi_dcs_write_seq(dsi, seq...) do { \ argument
38 ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
55 struct mipi_dsi_device *dsi = ctx->dsi; in tm5p5_nt35596_on() local
57 dsi_generic_write_seq(dsi, 0xff, 0x05); in tm5p5_nt35596_on()
58 dsi_generic_write_seq(dsi, 0xfb, 0x01); in tm5p5_nt35596_on()
59 dsi_generic_write_seq(dsi, 0xc5, 0x31); in tm5p5_nt35596_on()
60 dsi_generic_write_seq(dsi, 0xff, 0x04); in tm5p5_nt35596_on()
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| D | panel-leadtek-ltk050h3146w.c | 247 #define dsi_dcs_write_seq(dsi, cmd, seq...) do { \ argument
250 ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \
257 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in ltk050h3146w_init_sequence() local
264 dsi_dcs_write_seq(dsi, 0xdf, 0x93, 0x65, 0xf8); in ltk050h3146w_init_sequence()
265 dsi_dcs_write_seq(dsi, 0xb0, 0x01, 0x03, 0x02, 0x00, 0x64, 0x06, in ltk050h3146w_init_sequence()
267 dsi_dcs_write_seq(dsi, 0xb2, 0x00, 0xb5); in ltk050h3146w_init_sequence()
268 dsi_dcs_write_seq(dsi, 0xb3, 0x00, 0xb5); in ltk050h3146w_init_sequence()
269 dsi_dcs_write_seq(dsi, 0xb7, 0x00, 0xbf, 0x00, 0x00, 0xbf, 0x00); in ltk050h3146w_init_sequence()
271 dsi_dcs_write_seq(dsi, 0xb9, 0x00, 0xc4, 0x23, 0x07); in ltk050h3146w_init_sequence()
272 dsi_dcs_write_seq(dsi, 0xbb, 0x02, 0x01, 0x24, 0x00, 0x28, 0x0f, in ltk050h3146w_init_sequence()
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| D | panel-sitronix-st7703.c | 76 #define dsi_generic_write_seq(dsi, seq...) do { \ argument
79 ret = mipi_dsi_generic_write(dsi, d, ARRAY_SIZE(d)); \
86 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in jh057n_init_sequence() local
93 dsi_generic_write_seq(dsi, ST7703_CMD_SETEXTC, in jh057n_init_sequence()
95 dsi_generic_write_seq(dsi, ST7703_CMD_SETRGBIF, in jh057n_init_sequence()
98 dsi_generic_write_seq(dsi, ST7703_CMD_SETSCR, in jh057n_init_sequence()
101 dsi_generic_write_seq(dsi, ST7703_CMD_SETVDC, 0x4E); in jh057n_init_sequence()
102 dsi_generic_write_seq(dsi, ST7703_CMD_SETPANEL, 0x0B); in jh057n_init_sequence()
103 dsi_generic_write_seq(dsi, ST7703_CMD_SETCYC, 0x80); in jh057n_init_sequence()
104 dsi_generic_write_seq(dsi, ST7703_CMD_SETDISP, 0xF0, 0x12, 0x30); in jh057n_init_sequence()
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| D | panel-jdi-lt070me05000.c | 35 struct mipi_dsi_device *dsi; member
57 struct mipi_dsi_device *dsi = jdi->dsi; in jdi_panel_init() local
58 struct device *dev = &jdi->dsi->dev; in jdi_panel_init()
61 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in jdi_panel_init()
63 ret = mipi_dsi_dcs_soft_reset(dsi); in jdi_panel_init()
69 ret = mipi_dsi_dcs_set_pixel_format(dsi, MIPI_DCS_PIXEL_FMT_24BIT << 4); in jdi_panel_init()
75 ret = mipi_dsi_dcs_set_column_address(dsi, 0, jdi->mode->hdisplay - 1); in jdi_panel_init()
81 ret = mipi_dsi_dcs_set_page_address(dsi, 0, jdi->mode->vdisplay - 1); in jdi_panel_init()
93 ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, in jdi_panel_init()
101 ret = mipi_dsi_dcs_write(dsi, MIPI_DCS_WRITE_POWER_SAVE, in jdi_panel_init()
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| D | panel-samsung-s6e88a0-ams452ef01.c | 18 struct mipi_dsi_device *dsi; member
31 #define dsi_dcs_write_seq(dsi, seq...) do { \ argument
34 ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
51 struct mipi_dsi_device *dsi = ctx->dsi; in s6e88a0_ams452ef01_on() local
52 struct device *dev = &dsi->dev; in s6e88a0_ams452ef01_on()
55 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in s6e88a0_ams452ef01_on()
57 dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); // enable LEVEL2 commands in s6e88a0_ams452ef01_on()
58 dsi_dcs_write_seq(dsi, 0xcc, 0x4c); // set Pixel Clock Divider polarity in s6e88a0_ams452ef01_on()
60 ret = mipi_dsi_dcs_exit_sleep_mode(dsi); in s6e88a0_ams452ef01_on()
68 dsi_dcs_write_seq(dsi, 0xca, in s6e88a0_ams452ef01_on()
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| D | panel-samsung-sofef00.c | 24 struct mipi_dsi_device *dsi; member
37 #define dsi_dcs_write_seq(dsi, seq...) do { \ argument
40 ret = mipi_dsi_dcs_write_buffer(dsi, d, ARRAY_SIZE(d)); \
57 struct mipi_dsi_device *dsi = ctx->dsi; in sofef00_panel_on() local
58 struct device *dev = &dsi->dev; in sofef00_panel_on()
61 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in sofef00_panel_on()
63 ret = mipi_dsi_dcs_exit_sleep_mode(dsi); in sofef00_panel_on()
70 dsi_dcs_write_seq(dsi, 0xf0, 0x5a, 0x5a); in sofef00_panel_on()
72 ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK); in sofef00_panel_on()
78 dsi_dcs_write_seq(dsi, 0xf0, 0xa5, 0xa5); in sofef00_panel_on()
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| D | panel-xinpeng-xpp055c272.c | 63 #define dsi_generic_write_seq(dsi, cmd, seq...) do { \ argument
66 ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \
73 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in xpp055c272_init_sequence() local
80 dsi_generic_write_seq(dsi, XPP055C272_CMD_SETEXTC, 0xf1, 0x12, 0x83); in xpp055c272_init_sequence()
81 dsi_generic_write_seq(dsi, XPP055C272_CMD_SETMIPI, in xpp055c272_init_sequence()
86 dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPOWER_EXT, 0x25); in xpp055c272_init_sequence()
87 dsi_generic_write_seq(dsi, XPP055C272_CMD_SETPCR, 0x02, 0x11, 0x00); in xpp055c272_init_sequence()
88 dsi_generic_write_seq(dsi, XPP055C272_CMD_SETRGBIF, in xpp055c272_init_sequence()
91 dsi_generic_write_seq(dsi, XPP055C272_CMD_SETSCR, in xpp055c272_init_sequence()
94 dsi_generic_write_seq(dsi, XPP055C272_CMD_SETVDC, 0x46); in xpp055c272_init_sequence()
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| D | panel-elida-kd35t133.c | 54 #define dsi_dcs_write_seq(dsi, cmd, seq...) do { \ argument
57 ret = mipi_dsi_dcs_write_buffer(dsi, b, ARRAY_SIZE(b)); \
64 struct mipi_dsi_device *dsi = to_mipi_dsi_device(ctx->dev); in kd35t133_init_sequence() local
71 dsi_dcs_write_seq(dsi, KD35T133_CMD_POSITIVEGAMMA, in kd35t133_init_sequence()
74 dsi_dcs_write_seq(dsi, KD35T133_CMD_NEGATIVEGAMMA, in kd35t133_init_sequence()
77 dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL1, 0x18, 0x17); in kd35t133_init_sequence()
78 dsi_dcs_write_seq(dsi, KD35T133_CMD_POWERCONTROL2, 0x41); in kd35t133_init_sequence()
79 dsi_dcs_write_seq(dsi, KD35T133_CMD_VCOMCONTROL, 0x00, 0x1a, 0x80); in kd35t133_init_sequence()
80 dsi_dcs_write_seq(dsi, MIPI_DCS_SET_ADDRESS_MODE, 0x48); in kd35t133_init_sequence()
81 dsi_dcs_write_seq(dsi, MIPI_DCS_SET_PIXEL_FORMAT, 0x55); in kd35t133_init_sequence()
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| D | panel-raydium-rm67191.c | 198 struct mipi_dsi_device *dsi; member
231 static int rad_panel_push_cmd_list(struct mipi_dsi_device *dsi) in rad_panel_push_cmd_list() argument
241 ret = mipi_dsi_generic_write(dsi, &buffer, sizeof(buffer)); in rad_panel_push_cmd_list()
319 struct mipi_dsi_device *dsi = rad->dsi; in rad_panel_enable() local
320 struct device *dev = &dsi->dev; in rad_panel_enable()
321 int color_format = color_format_from_dsi_format(dsi->format); in rad_panel_enable()
327 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in rad_panel_enable()
329 ret = rad_panel_push_cmd_list(dsi); in rad_panel_enable()
336 ret = mipi_dsi_generic_write(dsi, (u8[]){ WRMAUCCTR, 0x00 }, 2); in rad_panel_enable()
341 ret = mipi_dsi_dcs_soft_reset(dsi); in rad_panel_enable()
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| D | panel-sharp-ls043t1le01.c | 25 struct mipi_dsi_device *dsi; member
43 struct mipi_dsi_device *dsi = sharp_nt->dsi; in sharp_nt_panel_init() local
46 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in sharp_nt_panel_init()
48 ret = mipi_dsi_dcs_exit_sleep_mode(dsi); in sharp_nt_panel_init()
55 ret = mipi_dsi_dcs_write(dsi, 0xae, (u8[]){ 0x03 }, 1); in sharp_nt_panel_init()
60 ret = mipi_dsi_dcs_set_pixel_format(dsi, MIPI_DCS_PIXEL_FMT_24BIT | in sharp_nt_panel_init()
70 struct mipi_dsi_device *dsi = sharp_nt->dsi; in sharp_nt_panel_on() local
73 dsi->mode_flags |= MIPI_DSI_MODE_LPM; in sharp_nt_panel_on()
75 ret = mipi_dsi_dcs_set_display_on(dsi); in sharp_nt_panel_on()
84 struct mipi_dsi_device *dsi = sharp_nt->dsi; in sharp_nt_panel_off() local
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| D | panel-feiyang-fy07024di26a30d.c | 21 struct mipi_dsi_device *dsi; member
50 struct mipi_dsi_device *dsi = ctx->dsi; in feiyang_prepare() local
85 ret = mipi_dsi_dcs_write_buffer(dsi, cmd->data, in feiyang_prepare()
101 mipi_dsi_dcs_set_display_on(ctx->dsi); in feiyang_enable()
110 return mipi_dsi_dcs_set_display_off(ctx->dsi); in feiyang_disable()
118 ret = mipi_dsi_dcs_set_display_off(ctx->dsi); in feiyang_unprepare()
122 ret = mipi_dsi_dcs_enter_sleep_mode(ctx->dsi); in feiyang_unprepare()
165 dev_err(&ctx->dsi->dev, "failed to add mode %ux%u@%u\n", in feiyang_get_modes()
187 static int feiyang_dsi_probe(struct mipi_dsi_device *dsi) in feiyang_dsi_probe() argument
192 ctx = devm_kzalloc(&dsi->dev, sizeof(*ctx), GFP_KERNEL); in feiyang_dsi_probe()
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| /Linux-v5.15/drivers/gpu/drm/sun4i/ |
| D | sun6i_mipi_dsi.c | 291 static void sun6i_dsi_inst_abort(struct sun6i_dsi *dsi) in sun6i_dsi_inst_abort() argument
293 regmap_update_bits(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_abort()
297 static void sun6i_dsi_inst_commit(struct sun6i_dsi *dsi) in sun6i_dsi_inst_commit() argument
299 regmap_update_bits(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_commit()
304 static int sun6i_dsi_inst_wait_for_completion(struct sun6i_dsi *dsi) in sun6i_dsi_inst_wait_for_completion() argument
308 return regmap_read_poll_timeout(dsi->regs, SUN6I_DSI_BASIC_CTL0_REG, in sun6i_dsi_inst_wait_for_completion()
314 static void sun6i_dsi_inst_setup(struct sun6i_dsi *dsi, in sun6i_dsi_inst_setup() argument
321 regmap_write(dsi->regs, SUN6I_DSI_INST_FUNC_REG(id), in sun6i_dsi_inst_setup()
329 static void sun6i_dsi_inst_init(struct sun6i_dsi *dsi, in sun6i_dsi_inst_init() argument
334 sun6i_dsi_inst_setup(dsi, DSI_INST_ID_LP11, DSI_INST_MODE_STOP, in sun6i_dsi_inst_init()
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| /Linux-v5.15/drivers/gpu/drm/stm/ |
| D | dw_mipi_dsi-stm.c | 80 struct dw_mipi_dsi *dsi; member
87 static inline void dsi_write(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 val) in dsi_write() argument
89 writel(val, dsi->base + reg); in dsi_write()
92 static inline u32 dsi_read(struct dw_mipi_dsi_stm *dsi, u32 reg) in dsi_read() argument
94 return readl(dsi->base + reg); in dsi_read()
97 static inline void dsi_set(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 mask) in dsi_set() argument
99 dsi_write(dsi, reg, dsi_read(dsi, reg) | mask); in dsi_set()
102 static inline void dsi_clear(struct dw_mipi_dsi_stm *dsi, u32 reg, u32 mask) in dsi_clear() argument
104 dsi_write(dsi, reg, dsi_read(dsi, reg) & ~mask); in dsi_clear()
107 static inline void dsi_update_bits(struct dw_mipi_dsi_stm *dsi, u32 reg, in dsi_update_bits() argument
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| /Linux-v5.15/drivers/gpu/drm/ |
| D | drm_mipi_dsi.c | 52 struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); in mipi_dsi_device_match() local
59 if (!strcmp(dsi->name, drv->name)) in mipi_dsi_device_match()
67 struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); in mipi_dsi_uevent() local
75 dsi->name); in mipi_dsi_uevent()
118 struct mipi_dsi_device *dsi = to_mipi_dsi_device(dev); in mipi_dsi_dev_release() local
121 kfree(dsi); in mipi_dsi_dev_release()
130 struct mipi_dsi_device *dsi; in mipi_dsi_device_alloc() local
132 dsi = kzalloc(sizeof(*dsi), GFP_KERNEL); in mipi_dsi_device_alloc()
133 if (!dsi) in mipi_dsi_device_alloc()
136 dsi->host = host; in mipi_dsi_device_alloc()
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| /Linux-v5.15/drivers/gpu/drm/vc4/ |
| D | vc4_dsi.c | 562 dsi_dma_workaround_write(struct vc4_dsi *dsi, u32 offset, u32 val) in dsi_dma_workaround_write() argument
564 struct dma_chan *chan = dsi->reg_dma_chan; in dsi_dma_workaround_write()
571 writel(val, dsi->regs + offset); in dsi_dma_workaround_write()
575 *dsi->reg_dma_mem = val; in dsi_dma_workaround_write()
578 dsi->reg_paddr + offset, in dsi_dma_workaround_write()
579 dsi->reg_dma_paddr, in dsi_dma_workaround_write()
597 #define DSI_READ(offset) readl(dsi->regs + (offset))
598 #define DSI_WRITE(offset, val) dsi_dma_workaround_write(dsi, offset, val)
600 DSI_READ(dsi->variant->port ? DSI1_##offset : DSI0_##offset)
602 DSI_WRITE(dsi->variant->port ? DSI1_##offset : DSI0_##offset, val)
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| /Linux-v5.15/include/drm/ |
| D | drm_mipi_dsi.h | 91 struct mipi_dsi_device *dsi);
93 struct mipi_dsi_device *dsi);
229 void mipi_dsi_device_unregister(struct mipi_dsi_device *dsi);
231 int mipi_dsi_attach(struct mipi_dsi_device *dsi);
232 int mipi_dsi_detach(struct mipi_dsi_device *dsi);
233 int mipi_dsi_shutdown_peripheral(struct mipi_dsi_device *dsi);
234 int mipi_dsi_turn_on_peripheral(struct mipi_dsi_device *dsi);
235 int mipi_dsi_set_maximum_return_packet_size(struct mipi_dsi_device *dsi,
237 ssize_t mipi_dsi_compression_mode(struct mipi_dsi_device *dsi, bool enable);
238 ssize_t mipi_dsi_picture_parameter_set(struct mipi_dsi_device *dsi,
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| /Linux-v5.15/drivers/video/fbdev/omap2/omapfb/dss/ |
| D | dsi.c | 434 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); in dsi_write_reg() local
438 case DSI_PROTO: base = dsi->proto_base; break; in dsi_write_reg()
439 case DSI_PHY: base = dsi->phy_base; break; in dsi_write_reg()
440 case DSI_PLL: base = dsi->pll_base; break; in dsi_write_reg()
450 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); in dsi_read_reg() local
454 case DSI_PROTO: base = dsi->proto_base; break; in dsi_read_reg()
455 case DSI_PHY: base = dsi->phy_base; break; in dsi_read_reg()
456 case DSI_PLL: base = dsi->pll_base; break; in dsi_read_reg()
466 struct dsi_data *dsi = dsi_get_dsidrv_data(dsidev); in dsi_bus_lock() local
468 down(&dsi->bus_lock); in dsi_bus_lock()
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