| /Linux-v5.15/drivers/gpu/drm/i915/display/ |
| D | intel_dsb.c | 96 struct intel_dsb *dsb = crtc_state->dsb; in intel_dsb_indexed_reg_write() local
102 if (!dsb) { in intel_dsb_indexed_reg_write()
106 buf = dsb->cmd_buf; in intel_dsb_indexed_reg_write()
107 if (drm_WARN_ON(&dev_priv->drm, dsb->free_pos >= DSB_BUF_SIZE)) { in intel_dsb_indexed_reg_write()
128 reg_val = buf[dsb->ins_start_offset + 1] & DSB_REG_VALUE_MASK; in intel_dsb_indexed_reg_write()
131 dsb->free_pos = ALIGN(dsb->free_pos, 2); in intel_dsb_indexed_reg_write()
133 dsb->ins_start_offset = dsb->free_pos; in intel_dsb_indexed_reg_write()
136 buf[dsb->free_pos++] = 1; in intel_dsb_indexed_reg_write()
139 buf[dsb->free_pos++] = (DSB_OPCODE_INDEXED_WRITE << in intel_dsb_indexed_reg_write()
144 buf[dsb->free_pos++] = val; in intel_dsb_indexed_reg_write()
[all …]
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| /Linux-v5.15/arch/arm64/include/asm/ |
| D | tlbflush.h | 232 dsb(nshst); in local_flush_tlb_all()
234 dsb(nsh); in local_flush_tlb_all()
240 dsb(ishst); in flush_tlb_all()
242 dsb(ish); in flush_tlb_all()
250 dsb(ishst); in flush_tlb_mm()
254 dsb(ish); in flush_tlb_mm()
262 dsb(ishst); in flush_tlb_page_nosync()
272 dsb(ish); in flush_tlb_page()
307 dsb(ishst); in __flush_tlb_range()
360 dsb(ish); in __flush_tlb_range()
[all …]
|
| D | barrier.h | 23 #define dsb(opt) asm volatile("dsb " #opt : : : "memory") macro
35 dsb(sy); \
41 #define mb() dsb(sy)
42 #define rmb() dsb(ld)
43 #define wmb() dsb(st)
|
| /Linux-v5.15/arch/arm64/kvm/hyp/nvhe/ |
| D | tlb.c | 63 dsb(ishst); in __kvm_tlb_flush_vmid_ipa()
82 dsb(ish); in __kvm_tlb_flush_vmid_ipa()
84 dsb(ish); in __kvm_tlb_flush_vmid_ipa()
116 dsb(ishst); in __kvm_tlb_flush_vmid()
122 dsb(ish); in __kvm_tlb_flush_vmid()
137 dsb(nsh); in __kvm_flush_cpu_context()
145 dsb(ishst); in __kvm_flush_vm_context()
160 dsb(ish); in __kvm_flush_vm_context()
|
| D | debug-sr.c | 40 dsb(nsh); in __debug_save_spe()
72 dsb(nsh); in __debug_save_trace()
|
| /Linux-v5.15/fs/erofs/ |
| D | super.c | 54 struct erofs_super_block *dsb; in erofs_superblock_csum_verify() local
57 dsb = kmemdup(sbdata + EROFS_SUPER_OFFSET, in erofs_superblock_csum_verify()
59 if (!dsb) in erofs_superblock_csum_verify()
62 expected_crc = le32_to_cpu(dsb->checksum); in erofs_superblock_csum_verify()
63 dsb->checksum = 0; in erofs_superblock_csum_verify()
65 crc = crc32c(~0, dsb, EROFS_BLKSIZ - EROFS_SUPER_OFFSET); in erofs_superblock_csum_verify()
66 kfree(dsb); in erofs_superblock_csum_verify()
109 struct erofs_super_block *dsb) in check_layout_compatibility() argument
111 const unsigned int feature = le32_to_cpu(dsb->feature_incompat); in check_layout_compatibility()
190 struct erofs_super_block *dsb) in erofs_load_compr_cfgs() argument
[all …]
|
| /Linux-v5.15/arch/arm64/kvm/hyp/vhe/ |
| D | tlb.c | 87 dsb(ishst); in __kvm_tlb_flush_vmid_ipa()
106 dsb(ish); in __kvm_tlb_flush_vmid_ipa()
108 dsb(ish); in __kvm_tlb_flush_vmid_ipa()
118 dsb(ishst); in __kvm_tlb_flush_vmid()
124 dsb(ish); in __kvm_tlb_flush_vmid()
139 dsb(nsh); in __kvm_flush_cpu_context()
147 dsb(ishst); in __kvm_flush_vm_context()
162 dsb(ish); in __kvm_flush_vm_context()
|
| /Linux-v5.15/arch/arm/include/asm/ |
| D | barrier.h | 20 #define dsb(option) __asm__ __volatile__ ("dsb " #option : : : "memory") macro
31 #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ macro
38 #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ macro
43 #define dsb(x) __asm__ __volatile__ ("mcr p15, 0, %0, c7, c10, 4" \ macro
58 #define __arm_heavy_mb(x...) do { dsb(x); arm_heavy_mb(); } while (0)
60 #define __arm_heavy_mb(x...) dsb(x)
65 #define rmb() dsb()
|
| D | tlbflush.h | 332 dsb(nshst); in local_flush_tlb_all()
338 dsb(nsh); in local_flush_tlb_all()
349 dsb(ishst); in __flush_tlb_all()
355 dsb(ish); in __flush_tlb_all()
385 dsb(nshst); in local_flush_tlb_mm()
391 dsb(nsh); in local_flush_tlb_mm()
399 dsb(ishst); in __flush_tlb_mm()
409 dsb(ish); in __flush_tlb_mm()
442 dsb(nshst); in local_flush_tlb_page()
448 dsb(nsh); in local_flush_tlb_page()
[all …]
|
| /Linux-v5.15/arch/arm/mach-omap2/ |
| D | omap-smc.S | 29 dsb
51 dsb
69 dsb @ Memory Barrier (not sure if needed, copied from omap_smc2)
77 dsb
85 dsb
93 dsb
|
| D | sleep43xx.S | 99 dsb
114 dsb
116 dsb
138 dsb
140 dsb
262 dsb
388 dsb
390 dsb
394 dsb
396 dsb
[all …]
|
| D | sleep44xx.S | 27 dsb
29 dsb
132 dsb
224 dsb
349 dsb
|
| D | sleep34xx.S | 96 dsb @ data write barrier
212 dsb
296 dsb
299 dsb
417 dsb @ data write barrier
428 dsb @ data write barrier
443 dsb @ data write barrier
|
| D | omap-headsmp.S | 83 dsb
100 dsb
|
| /Linux-v5.15/arch/nds32/include/asm/ |
| D | assembler.h | 9 dsb
14 dsb
20 dsb
27 dsb
|
| /Linux-v5.15/arch/arm/mm/ |
| D | cache-xsc3l2.c | 55 dsb(); in xsc3_l2_inv_all()
127 dsb(); in xsc3_l2_inv_range()
145 dsb(); in xsc3_l2_clean_range()
165 dsb(); in xsc3_l2_flush_all()
189 dsb(); in xsc3_l2_flush_range()
|
| D | cache-v7.S | 68 3: dsb st
172 dsb
178 dsb st
286 ALT_SMP(W(dsb))
294 dsb ishst
311 dsb ishst
321 dsb
344 ALT_SMP(W(dsb))
352 dsb st
372 ALT_SMP(W(dsb))
[all …]
|
| D | tlb-v7.S | 35 dsb ish
56 dsb ish
69 dsb ish
84 dsb ish
|
| D | pv-fixup-asm.S | 25 dsb
72 dsb
77 dsb
81 dsb
|
| D | cache-tauros2.c | 95 dsb(); in tauros2_inv_range()
106 dsb(); in tauros2_clean_range()
117 dsb(); in tauros2_flush_range()
|
| /Linux-v5.15/arch/arm/kernel/ |
| D | v7m.c | 12 dsb(); in armv7m_restart()
15 dsb(); in armv7m_restart()
|
| /Linux-v5.15/arch/arm64/kernel/ |
| D | relocate_kernel.S | 54 dsb sy
70 dsb nsh
72 dsb nsh
|
| D | hibernate-asm.S | 30 dsb nsh
102 dsb ish /* wait for PoU cleaning to finish */
108 dsb ish
|
| /Linux-v5.15/arch/arm64/mm/ |
| D | cache.S | 30 dsb ishst
126 dsb ishst
167 dsb sy
|
| /Linux-v5.15/drivers/staging/vc04_services/interface/vchiq_arm/ |
| D | vchiq_core.h | 23 #ifndef dsb
24 #define dsb(a) macro
110 do { debug_ptr[DEBUG_ ## d] = __LINE__; dsb(sy); } while (0)
112 do { debug_ptr[DEBUG_ ## d] = (v); dsb(sy); } while (0)
114 do { debug_ptr[DEBUG_ ## d]++; dsb(sy); } while (0)
|
