| /Linux-v5.15/drivers/gpu/drm/amd/display/dmub/ |
| D | dmub_srv.h | 74 struct dmub_srv;
292 void (*init)(struct dmub_srv *dmub);
294 void (*reset)(struct dmub_srv *dmub);
296 void (*reset_release)(struct dmub_srv *dmub);
298 void (*backdoor_load)(struct dmub_srv *dmub,
302 void (*setup_windows)(struct dmub_srv *dmub,
309 void (*setup_mailbox)(struct dmub_srv *dmub,
312 uint32_t (*get_inbox1_rptr)(struct dmub_srv *dmub);
314 void (*set_inbox1_wptr)(struct dmub_srv *dmub, uint32_t wptr_offset);
316 void (*setup_out_mailbox)(struct dmub_srv *dmub,
[all …]
|
| /Linux-v5.15/drivers/gpu/drm/amd/display/dmub/src/ |
| D | dmub_dcn20.h | 31 struct dmub_srv;
185 void dmub_dcn20_init(struct dmub_srv *dmub);
187 void dmub_dcn20_reset(struct dmub_srv *dmub);
189 void dmub_dcn20_reset_release(struct dmub_srv *dmub);
191 void dmub_dcn20_backdoor_load(struct dmub_srv *dmub,
195 void dmub_dcn20_setup_windows(struct dmub_srv *dmub,
202 void dmub_dcn20_setup_mailbox(struct dmub_srv *dmub,
205 uint32_t dmub_dcn20_get_inbox1_rptr(struct dmub_srv *dmub);
207 void dmub_dcn20_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset);
209 void dmub_dcn20_setup_out_mailbox(struct dmub_srv *dmub,
[all …]
|
| D | dmub_dcn31.h | 31 struct dmub_srv;
186 void dmub_dcn31_init(struct dmub_srv *dmub);
188 void dmub_dcn31_reset(struct dmub_srv *dmub);
190 void dmub_dcn31_reset_release(struct dmub_srv *dmub);
192 void dmub_dcn31_backdoor_load(struct dmub_srv *dmub,
196 void dmub_dcn31_setup_windows(struct dmub_srv *dmub,
203 void dmub_dcn31_setup_mailbox(struct dmub_srv *dmub,
206 uint32_t dmub_dcn31_get_inbox1_rptr(struct dmub_srv *dmub);
208 void dmub_dcn31_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset);
210 void dmub_dcn31_setup_out_mailbox(struct dmub_srv *dmub,
[all …]
|
| D | dmub_dcn31.c | 56 static void dmub_dcn31_get_fb_base_offset(struct dmub_srv *dmub, in dmub_dcn31_get_fb_base_offset()
83 void dmub_dcn31_reset(struct dmub_srv *dmub) in dmub_dcn31_reset()
135 void dmub_dcn31_reset_release(struct dmub_srv *dmub) in dmub_dcn31_reset_release()
143 void dmub_dcn31_backdoor_load(struct dmub_srv *dmub, in dmub_dcn31_backdoor_load()
176 void dmub_dcn31_setup_windows(struct dmub_srv *dmub, in dmub_dcn31_setup_windows()
229 void dmub_dcn31_setup_mailbox(struct dmub_srv *dmub, in dmub_dcn31_setup_mailbox()
236 uint32_t dmub_dcn31_get_inbox1_rptr(struct dmub_srv *dmub) in dmub_dcn31_get_inbox1_rptr()
241 void dmub_dcn31_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset) in dmub_dcn31_set_inbox1_wptr()
246 void dmub_dcn31_setup_out_mailbox(struct dmub_srv *dmub, in dmub_dcn31_setup_out_mailbox()
253 uint32_t dmub_dcn31_get_outbox1_wptr(struct dmub_srv *dmub) in dmub_dcn31_get_outbox1_wptr()
[all …]
|
| D | dmub_dcn20.c | 60 static void dmub_dcn20_get_fb_base_offset(struct dmub_srv *dmub, in dmub_dcn20_get_fb_base_offset()
87 bool dmub_dcn20_use_cached_inbox(struct dmub_srv *dmub) in dmub_dcn20_use_cached_inbox()
94 void dmub_dcn20_reset(struct dmub_srv *dmub) in dmub_dcn20_reset()
146 void dmub_dcn20_reset_release(struct dmub_srv *dmub) in dmub_dcn20_reset_release()
154 void dmub_dcn20_backdoor_load(struct dmub_srv *dmub, in dmub_dcn20_backdoor_load()
189 void dmub_dcn20_setup_windows(struct dmub_srv *dmub, in dmub_dcn20_setup_windows()
273 void dmub_dcn20_setup_mailbox(struct dmub_srv *dmub, in dmub_dcn20_setup_mailbox()
285 uint32_t dmub_dcn20_get_inbox1_rptr(struct dmub_srv *dmub) in dmub_dcn20_get_inbox1_rptr()
290 void dmub_dcn20_set_inbox1_wptr(struct dmub_srv *dmub, uint32_t wptr_offset) in dmub_dcn20_set_inbox1_wptr()
295 void dmub_dcn20_setup_out_mailbox(struct dmub_srv *dmub, in dmub_dcn20_setup_out_mailbox()
[all …]
|
| D | dmub_srv.c | 137 static bool dmub_srv_hw_setup(struct dmub_srv *dmub, enum dmub_asic asic) in dmub_srv_hw_setup()
249 enum dmub_status dmub_srv_create(struct dmub_srv *dmub, in dmub_srv_create()
299 void dmub_srv_destroy(struct dmub_srv *dmub) in dmub_srv_destroy()
305 dmub_srv_calc_region_info(struct dmub_srv *dmub, in dmub_srv_calc_region_info()
380 enum dmub_status dmub_srv_calc_fb_info(struct dmub_srv *dmub, in dmub_srv_calc_fb_info()
413 enum dmub_status dmub_srv_has_hw_support(struct dmub_srv *dmub, in dmub_srv_has_hw_support()
427 enum dmub_status dmub_srv_is_hw_init(struct dmub_srv *dmub, bool *is_hw_init) in dmub_srv_is_hw_init()
443 enum dmub_status dmub_srv_hw_init(struct dmub_srv *dmub, in dmub_srv_hw_init()
573 enum dmub_status dmub_srv_hw_reset(struct dmub_srv *dmub) in dmub_srv_hw_reset()
586 enum dmub_status dmub_srv_cmd_queue(struct dmub_srv *dmub, in dmub_srv_cmd_queue()
[all …]
|
| D | dmub_dcn30.h | 37 void dmub_dcn30_backdoor_load(struct dmub_srv *dmub,
41 void dmub_dcn30_setup_windows(struct dmub_srv *dmub,
|
| D | dmub_reg.h | 31 struct dmub_srv;
115 void dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n,
118 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1,
121 void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift,
|
| D | dmub_reg.c | 72 void dmub_reg_update(struct dmub_srv *srv, uint32_t addr, int n, uint8_t shift1, in dmub_reg_update()
89 void dmub_reg_set(struct dmub_srv *srv, uint32_t addr, uint32_t reg_val, int n, in dmub_reg_set()
104 void dmub_reg_get(struct dmub_srv *srv, uint32_t addr, uint8_t shift, in dmub_reg_get()
|
| D | dmub_dcn30.c | 60 static void dmub_dcn30_get_fb_base_offset(struct dmub_srv *dmub, in dmub_dcn30_get_fb_base_offset()
87 void dmub_dcn30_backdoor_load(struct dmub_srv *dmub, in dmub_dcn30_backdoor_load()
122 void dmub_dcn30_setup_windows(struct dmub_srv *dmub, in dmub_dcn30_setup_windows()
|
| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/ |
| D | dc_dmub_srv.c | 35 struct dmub_srv *dmub) in dc_dmub_srv_construct()
41 struct dc_dmub_srv *dc_dmub_srv_create(struct dc *dc, struct dmub_srv *dmub) in dc_dmub_srv_create()
56 void dc_dmub_srv_destroy(struct dc_dmub_srv **dmub_srv) in dc_dmub_srv_destroy() argument
58 if (*dmub_srv) { in dc_dmub_srv_destroy()
59 kfree(*dmub_srv); in dc_dmub_srv_destroy()
60 *dmub_srv = NULL; in dc_dmub_srv_destroy()
67 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_cmd_queue()
94 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_cmd_execute()
107 struct dmub_srv *dmub = dc_dmub_srv->dmub; in dc_dmub_srv_wait_idle()
118 void dc_dmub_srv_send_inbox0_cmd(struct dc_dmub_srv *dmub_srv, in dc_dmub_srv_send_inbox0_cmd() argument
[all …]
|
| D | dc_helper.c | 51 gather = ctx->dmub_srv->reg_helper_offload.gather_in_progress; in submit_dmub_read_modify_write()
52 ctx->dmub_srv->reg_helper_offload.gather_in_progress = false; in submit_dmub_read_modify_write()
54 dc_dmub_srv_cmd_queue(ctx->dmub_srv, &offload->cmd_data); in submit_dmub_read_modify_write()
56 ctx->dmub_srv->reg_helper_offload.gather_in_progress = gather; in submit_dmub_read_modify_write()
74 gather = ctx->dmub_srv->reg_helper_offload.gather_in_progress; in submit_dmub_burst_write()
75 ctx->dmub_srv->reg_helper_offload.gather_in_progress = false; in submit_dmub_burst_write()
77 dc_dmub_srv_cmd_queue(ctx->dmub_srv, &offload->cmd_data); in submit_dmub_burst_write()
79 ctx->dmub_srv->reg_helper_offload.gather_in_progress = gather; in submit_dmub_burst_write()
93 gather = ctx->dmub_srv->reg_helper_offload.gather_in_progress; in submit_dmub_reg_wait()
94 ctx->dmub_srv->reg_helper_offload.gather_in_progress = false; in submit_dmub_reg_wait()
[all …]
|
| D | dc_dmub_srv.h | 32 struct dmub_srv;
44 struct dmub_srv *dmub;
71 void dc_dmub_srv_send_inbox0_cmd(struct dc_dmub_srv *dmub_srv, union dmub_inbox0_data_register data…
|
| D | dm_services.h | 41 struct dmub_srv;
126 struct dc_dmub_srv *dc_dmub_srv_create(struct dc *dc, struct dmub_srv *dmub);
127 void dc_dmub_srv_destroy(struct dc_dmub_srv **dmub_srv);
|
| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dce/ |
| D | dmub_psr.c | 84 struct dmub_srv *srv = dmub->ctx->dmub_srv->dmub; in dmub_psr_get_state()
143 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dmub_psr_set_version()
144 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_psr_set_version()
145 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_psr_set_version()
173 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dmub_psr_enable()
174 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_psr_enable()
175 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_psr_enable()
223 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dmub_psr_set_level()
224 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_psr_set_level()
225 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_psr_set_level()
[all …]
|
| D | dmub_hw_lock_mgr.c | 31 void dmub_hw_lock_mgr_cmd(struct dc_dmub_srv *dmub_srv, in dmub_hw_lock_mgr_cmd() argument
50 dc_dmub_srv_cmd_queue(dmub_srv, &cmd); in dmub_hw_lock_mgr_cmd()
51 dc_dmub_srv_cmd_execute(dmub_srv); in dmub_hw_lock_mgr_cmd()
52 dc_dmub_srv_wait_idle(dmub_srv); in dmub_hw_lock_mgr_cmd()
55 void dmub_hw_lock_mgr_inbox0_cmd(struct dc_dmub_srv *dmub_srv, in dmub_hw_lock_mgr_inbox0_cmd() argument
60 dc_dmub_srv_send_inbox0_cmd(dmub_srv, data); in dmub_hw_lock_mgr_inbox0_cmd()
|
| D | dmub_abm.c | 74 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dmub_abm_enable_fractional_pwm()
75 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_abm_enable_fractional_pwm()
76 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_abm_enable_fractional_pwm()
166 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dmub_abm_set_level()
167 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_abm_set_level()
168 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_abm_set_level()
183 dmub_flush_buffer_mem(&dc->dmub_srv->dmub->scratch_mem_fb); in dmub_abm_init_config()
186 memcpy(dc->dmub_srv->dmub->scratch_mem_fb.cpu_addr, (void *)src, bytes); in dmub_abm_init_config()
192 …cmd.abm_init_config.abm_init_config_data.src.quad_part = dc->dmub_srv->dmub->scratch_mem_fb.gpu_ad… in dmub_abm_init_config()
199 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dmub_abm_init_config()
[all …]
|
| D | dmub_outbox.c | 48 dc_dmub_srv_cmd_queue(dc_ctx->dmub_srv, &cmd); in dmub_enable_outbox_notification()
49 dc_dmub_srv_cmd_execute(dc_ctx->dmub_srv); in dmub_enable_outbox_notification()
50 dc_dmub_srv_wait_idle(dc_ctx->dmub_srv); in dmub_enable_outbox_notification()
|
| D | dmub_hw_lock_mgr.h | 32 void dmub_hw_lock_mgr_cmd(struct dc_dmub_srv *dmub_srv,
37 void dmub_hw_lock_mgr_inbox0_cmd(struct dc_dmub_srv *dmub_srv,
|
| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/core/ |
| D | dc_stat.c | 59 struct dmub_srv *dmub = dc->ctx->dmub_srv->dmub; in dc_stat_get_dmub_notification()
83 struct dmub_srv *dmub = dc->ctx->dmub_srv->dmub; in dc_stat_get_dmub_dataout()
|
| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/bios/ |
| D | command_table2.c | 185 if (bp->base.ctx->dc->ctx->dmub_srv && in encoder_control_digx_v1_5()
187 encoder_control_dmcub(bp->base.ctx->dmub_srv, ¶ms); in encoder_control_digx_v1_5()
201 if (bp->base.ctx->dc->ctx->dmub_srv && in encoder_control_fallback()
302 if (bp->base.ctx->dc->ctx->dmub_srv && in transmitter_control_v1_6()
304 transmitter_control_dmcub(bp->base.ctx->dmub_srv, &ps.param); in transmitter_control_v1_6()
365 if (bp->base.ctx->dc->ctx->dmub_srv && in transmitter_control_v1_7()
367 transmitter_control_dmcub_v1_7(bp->base.ctx->dmub_srv, &dig_v1_7); in transmitter_control_v1_7()
381 if (bp->base.ctx->dc->ctx->dmub_srv && in transmitter_control_fallback()
513 if (bp->base.ctx->dc->ctx->dmub_srv && in set_pixel_clock_v7()
515 set_pixel_clock_dmcub(bp->base.ctx->dmub_srv, &clk); in set_pixel_clock_v7()
[all …]
|
| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn21/ |
| D | dcn21_hwseq.c | 155 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dmub_abm_set_pipe()
156 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dmub_abm_set_pipe()
157 dc_dmub_srv_wait_idle(dc->dmub_srv); in dmub_abm_set_pipe()
225 dc_dmub_srv_cmd_queue(dc->dmub_srv, &cmd); in dcn21_set_backlight_level()
226 dc_dmub_srv_cmd_execute(dc->dmub_srv); in dcn21_set_backlight_level()
227 dc_dmub_srv_wait_idle(dc->dmub_srv); in dcn21_set_backlight_level()
|
| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn31/ |
| D | dcn31_hwseq.c | 417 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn31_z10_save_init()
418 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn31_z10_save_init()
419 dc_dmub_srv_wait_idle(dc->ctx->dmub_srv); in dcn31_z10_save_init()
430 if (!dc_dmub_srv_is_restore_required(dc->ctx->dmub_srv)) in dcn31_z10_restore()
437 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn31_z10_restore()
438 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn31_z10_restore()
439 dc_dmub_srv_wait_idle(dc->ctx->dmub_srv); in dcn31_z10_restore()
|
| /Linux-v5.15/drivers/gpu/drm/amd/display/dc/dcn30/ |
| D | dcn30_hwseq.c | 742 if (!dc->ctx->dmub_srv) in dcn30_apply_idle_power_optimizations()
763 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn30_apply_idle_power_optimizations()
764 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn30_apply_idle_power_optimizations()
886 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn30_apply_idle_power_optimizations()
887 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn30_apply_idle_power_optimizations()
888 dc_dmub_srv_wait_idle(dc->ctx->dmub_srv); in dcn30_apply_idle_power_optimizations()
904 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn30_apply_idle_power_optimizations()
905 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn30_apply_idle_power_optimizations()
922 dc_dmub_srv_cmd_queue(dc->ctx->dmub_srv, &cmd); in dcn30_apply_idle_power_optimizations()
923 dc_dmub_srv_cmd_execute(dc->ctx->dmub_srv); in dcn30_apply_idle_power_optimizations()
[all …]
|
| /Linux-v5.15/drivers/gpu/drm/amd/display/amdgpu_dm/ |
| D | amdgpu_dm.h | 67 struct dmub_srv;
191 struct dmub_srv *dmub_srv; member
|
