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Searched refs:disp_int (Results 1 – 10 of 10) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/radeon/
Drs600.c726 rdev->irq.stat_regs.r500.disp_int = RREG32(R_007EDC_DISP_INTERRUPT_STATUS); in rs600_irq_ack()
727 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
731 if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
735 if (G_007EDC_DC_HOT_PLUG_DETECT1_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
740 if (G_007EDC_DC_HOT_PLUG_DETECT2_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_ack()
746 rdev->irq.stat_regs.r500.disp_int = 0; in rs600_irq_ack()
786 !rdev->irq.stat_regs.r500.disp_int && in rs600_irq_process()
791 rdev->irq.stat_regs.r500.disp_int || in rs600_irq_process()
798 if (G_007EDC_LB_D1_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_process()
807 if (G_007EDC_LB_D2_VBLANK_INTERRUPT(rdev->irq.stat_regs.r500.disp_int)) { in rs600_irq_process()
[all …]
Dr600.c3917 rdev->irq.stat_regs.r600.disp_int = RREG32(DCE3_DISP_INTERRUPT_STATUS); in r600_irq_ack()
3928 rdev->irq.stat_regs.r600.disp_int = RREG32(DISP_INTERRUPT_STATUS); in r600_irq_ack()
3941 if (rdev->irq.stat_regs.r600.disp_int & LB_D1_VBLANK_INTERRUPT) in r600_irq_ack()
3943 if (rdev->irq.stat_regs.r600.disp_int & LB_D1_VLINE_INTERRUPT) in r600_irq_ack()
3945 if (rdev->irq.stat_regs.r600.disp_int & LB_D2_VBLANK_INTERRUPT) in r600_irq_ack()
3947 if (rdev->irq.stat_regs.r600.disp_int & LB_D2_VLINE_INTERRUPT) in r600_irq_ack()
3949 if (rdev->irq.stat_regs.r600.disp_int & DC_HPD1_INTERRUPT) { in r600_irq_ack()
3960 if (rdev->irq.stat_regs.r600.disp_int & DC_HPD2_INTERRUPT) { in r600_irq_ack()
4135 if (!(rdev->irq.stat_regs.r600.disp_int & LB_D1_VBLANK_INTERRUPT)) in r600_irq_process()
4145 rdev->irq.stat_regs.r600.disp_int &= ~LB_D1_VBLANK_INTERRUPT; in r600_irq_process()
[all …]
Devergreen.c4617 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in evergreen_irq_ack() local
4621 disp_int[i] = RREG32(evergreen_disp_int_status[i]); in evergreen_irq_ack()
4636 if (disp_int[j] & LB_D1_VBLANK_INTERRUPT) in evergreen_irq_ack()
4639 if (disp_int[j] & LB_D1_VLINE_INTERRUPT) in evergreen_irq_ack()
4646 if (disp_int[i] & DC_HPD1_INTERRUPT) in evergreen_irq_ack()
4651 if (disp_int[i] & DC_HPD1_RX_INTERRUPT) in evergreen_irq_ack()
4704 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in evergreen_irq_process() local
4776 if (!(disp_int[crtc_idx] & mask)) { in evergreen_irq_process()
4781 disp_int[crtc_idx] &= ~mask; in evergreen_irq_process()
4814 if (!(disp_int[hpd_idx] & mask)) in evergreen_irq_process()
[all …]
Dsi.c6143 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in si_irq_ack() local
6150 disp_int[i] = RREG32(si_disp_int_status[i]); in si_irq_ack()
6164 if (disp_int[j] & LB_D1_VBLANK_INTERRUPT) in si_irq_ack()
6167 if (disp_int[j] & LB_D1_VLINE_INTERRUPT) in si_irq_ack()
6174 if (disp_int[i] & DC_HPD1_INTERRUPT) in si_irq_ack()
6179 if (disp_int[i] & DC_HPD1_RX_INTERRUPT) in si_irq_ack()
6242 u32 *disp_int = rdev->irq.stat_regs.evergreen.disp_int; in si_irq_process() local
6313 if (!(disp_int[crtc_idx] & mask)) { in si_irq_process()
6318 disp_int[crtc_idx] &= ~mask; in si_irq_process()
6351 if (!(disp_int[hpd_idx] & mask)) in si_irq_process()
[all …]
Dcik.c7289 rdev->irq.stat_regs.cik.disp_int = RREG32(DISP_INTERRUPT_STATUS); in cik_irq_ack()
7320 if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT) in cik_irq_ack()
7322 if (rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT) in cik_irq_ack()
7363 if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_INTERRUPT) { in cik_irq_ack()
7393 if (rdev->irq.stat_regs.cik.disp_int & DC_HPD1_RX_INTERRUPT) { in cik_irq_ack()
7584 if (!(rdev->irq.stat_regs.cik.disp_int & LB_D1_VBLANK_INTERRUPT)) in cik_irq_process()
7594 rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VBLANK_INTERRUPT; in cik_irq_process()
7599 if (!(rdev->irq.stat_regs.cik.disp_int & LB_D1_VLINE_INTERRUPT)) in cik_irq_process()
7602 rdev->irq.stat_regs.cik.disp_int &= ~LB_D1_VLINE_INTERRUPT; in cik_irq_process()
7774 if (!(rdev->irq.stat_regs.cik.disp_int & DC_HPD1_INTERRUPT)) in cik_irq_process()
[all …]
Dradeon.h747 u32 disp_int; member
752 u32 disp_int; member
762 u32 disp_int[6]; member
768 u32 disp_int; member
/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Ddce_v6_0.c2963 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v6_0_crtc_irq() local
2969 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v6_0_crtc_irq()
2980 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v6_0_crtc_irq()
3075 uint32_t disp_int, mask, tmp; in dce_v6_0_hpd_irq() local
3084 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v6_0_hpd_irq()
3087 if (disp_int & mask) { in dce_v6_0_hpd_irq()
Ddce_v8_0.c3055 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v8_0_crtc_irq() local
3061 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v8_0_crtc_irq()
3072 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v8_0_crtc_irq()
3167 uint32_t disp_int, mask, tmp; in dce_v8_0_hpd_irq() local
3176 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v8_0_hpd_irq()
3179 if (disp_int & mask) { in dce_v8_0_hpd_irq()
Ddce_v10_0.c3240 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v10_0_crtc_irq() local
3245 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v10_0_crtc_irq()
3257 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v10_0_crtc_irq()
3277 uint32_t disp_int, mask; in dce_v10_0_hpd_irq() local
3286 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v10_0_hpd_irq()
3289 if (disp_int & mask) { in dce_v10_0_hpd_irq()
Ddce_v11_0.c3363 uint32_t disp_int = RREG32(interrupt_status_offsets[crtc].reg); in dce_v11_0_crtc_irq() local
3369 if (disp_int & interrupt_status_offsets[crtc].vblank) in dce_v11_0_crtc_irq()
3381 if (disp_int & interrupt_status_offsets[crtc].vline) in dce_v11_0_crtc_irq()
3401 uint32_t disp_int, mask; in dce_v11_0_hpd_irq() local
3410 disp_int = RREG32(interrupt_status_offsets[hpd].reg); in dce_v11_0_hpd_irq()
3413 if (disp_int & mask) { in dce_v11_0_hpd_irq()