Searched refs:dclock (Results 1 – 7 of 7) sorted by relevance
1577 unsigned int eclock, dclock; in snd_echo_clock_source_put() local1584 dclock = chip->clock_source_list[eclock]; in snd_echo_clock_source_put()1585 if (chip->input_clock != dclock) { in snd_echo_clock_source_put()1588 changed = set_input_clock(chip, dclock); in snd_echo_clock_source_put()1597 "seticlk val%d err 0x%x\n", dclock, changed); in snd_echo_clock_source_put()
171 uint32_t dclock; member
223 uint32_t dclock; member
718 dpm_table->dpm_levels[0].value = data->vbios_boot_state.dclock / 100; in vega12_setup_default_dpm_tables()832 data->vbios_boot_state.dclock = boot_up_values.ulDClk; in vega12_init_smc_table()
704 dpm_table->dpm_levels[0].value = data->vbios_boot_state.dclock / 100; in vega20_setup_default_dpm_tables()804 data->vbios_boot_state.dclock = boot_up_values.ulDClk; in vega20_init_smc_table()
2057 uint32_t dclock, uint8_t *current_dclk_did) in vega10_populate_single_dclock_level() argument2063 dclock, ÷rs), in vega10_populate_single_dclock_level()
597 unsigned int dclock, hsync; in sisfb_verify_rate() local632 dclock = (htotal * vtotal * rate) / 1000; in sisfb_verify_rate()633 if(dclock > (monitor->dclockmax + 1000)) in sisfb_verify_rate()635 hsync = dclock / htotal; in sisfb_verify_rate()
