Searched refs:dcefclk (Results 1 – 7 of 7) sorted by relevance
340 smu->smu_table.boot_values.dcefclk = 0; in smu_v12_0_get_vbios_bootup_values()357 smu->smu_table.boot_values.dcefclk = 0; in smu_v12_0_get_vbios_bootup_values()378 &smu->smu_table.boot_values.dcefclk); in smu_v12_0_get_vbios_bootup_values()
537 smu->smu_table.boot_values.dcefclk = 0; in smu_v13_0_get_vbios_bootup_values()551 smu->smu_table.boot_values.dcefclk = 0; in smu_v13_0_get_vbios_bootup_values()566 smu->smu_table.boot_values.dcefclk = 0; in smu_v13_0_get_vbios_bootup_values()587 &smu->smu_table.boot_values.dcefclk); in smu_v13_0_get_vbios_bootup_values()848 max_sustainable_clocks->dcef_clock = smu->smu_table.boot_values.dcefclk / 100; in smu_v13_0_init_max_sustainable_clocks()
576 smu->smu_table.boot_values.dcefclk = 0; in smu_v11_0_get_vbios_bootup_values()593 smu->smu_table.boot_values.dcefclk = 0; in smu_v11_0_get_vbios_bootup_values()614 &smu->smu_table.boot_values.dcefclk); in smu_v11_0_get_vbios_bootup_values()877 max_sustainable_clocks->dcef_clock = smu->smu_table.boot_values.dcefclk / 100; in smu_v11_0_init_max_sustainable_clocks()
1087 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()1105 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()1123 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()1141 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in navi10_set_default_dpm_table()
839 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()857 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()875 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()893 dpm_table->dpm_levels[0].value = smu->smu_table.boot_values.dcefclk / 100; in sienna_cichlid_set_default_dpm_table()
294 uint32_t dcefclk; member
1274 smu->smu_table.boot_values.dcefclk / 100); in smu_smc_hw_setup()
