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Searched refs:cu_info (Results 1 – 24 of 24) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/amdkfd/
Dkfd_mqd_manager.c100 struct kfd_cu_info cu_info; in mqd_symmetrically_map_cu_mask() local
103 amdgpu_amdkfd_get_cu_info(mm->dev->kgd, &cu_info); in mqd_symmetrically_map_cu_mask()
105 if (cu_mask_count > cu_info.cu_active_number) in mqd_symmetrically_map_cu_mask()
106 cu_mask_count = cu_info.cu_active_number; in mqd_symmetrically_map_cu_mask()
112 if (cu_info.num_shader_engines > KFD_MAX_NUM_SE) { in mqd_symmetrically_map_cu_mask()
113 pr_err("Exceeded KFD_MAX_NUM_SE, chip reports %d\n", cu_info.num_shader_engines); in mqd_symmetrically_map_cu_mask()
116 if (cu_info.num_shader_arrays_per_engine > KFD_MAX_NUM_SH_PER_SE) { in mqd_symmetrically_map_cu_mask()
118 cu_info.num_shader_arrays_per_engine * cu_info.num_shader_engines); in mqd_symmetrically_map_cu_mask()
131 for (se = 0; se < cu_info.num_shader_engines; se++) in mqd_symmetrically_map_cu_mask()
132 for (sh = 0; sh < cu_info.num_shader_arrays_per_engine; sh++) in mqd_symmetrically_map_cu_mask()
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Dkfd_crat.c1199 struct kfd_cu_info *cu_info, in fill_in_l1_pcache() argument
1253 struct kfd_cu_info *cu_info, in fill_in_l2_l3_pcache() argument
1265 cu_sibling_map_mask = cu_info->cu_bitmap[0][0]; in fill_in_l2_l3_pcache()
1290 for (i = 0; i < cu_info->num_shader_engines; i++) { in fill_in_l2_l3_pcache()
1291 for (j = 0; j < cu_info->num_shader_arrays_per_engine; in fill_in_l2_l3_pcache()
1303 cu_info->cu_bitmap[i % 4][j + i / 4]; in fill_in_l2_l3_pcache()
1329 struct kfd_cu_info *cu_info, in kfd_fill_gpu_cache_info() argument
1459 for (i = 0; i < cu_info->num_shader_engines; i++) { in kfd_fill_gpu_cache_info()
1460 for (j = 0; j < cu_info->num_shader_arrays_per_engine; j++) { in kfd_fill_gpu_cache_info()
1461 for (k = 0; k < cu_info->num_cu_per_sh; in kfd_fill_gpu_cache_info()
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Dkfd_topology.c1283 struct kfd_cu_info cu_info; in kfd_topology_add_device() local
1357 amdgpu_amdkfd_get_cu_info(dev->gpu->kgd, &cu_info); in kfd_topology_add_device()
1363 cu_info.num_shader_arrays_per_engine; in kfd_topology_add_device()
1456 cu_info.simd_per_cu * cu_info.cu_active_number; in kfd_topology_add_device()
/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Damdgpu_amdkfd.c452 void amdgpu_amdkfd_get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info) in amdgpu_amdkfd_get_cu_info() argument
455 struct amdgpu_cu_info acu_info = adev->gfx.cu_info; in amdgpu_amdkfd_get_cu_info()
457 memset(cu_info, 0, sizeof(*cu_info)); in amdgpu_amdkfd_get_cu_info()
458 if (sizeof(cu_info->cu_bitmap) != sizeof(acu_info.bitmap)) in amdgpu_amdkfd_get_cu_info()
461 cu_info->cu_active_number = acu_info.number; in amdgpu_amdkfd_get_cu_info()
462 cu_info->cu_ao_mask = acu_info.ao_cu_mask; in amdgpu_amdkfd_get_cu_info()
463 memcpy(&cu_info->cu_bitmap[0], &acu_info.bitmap[0], in amdgpu_amdkfd_get_cu_info()
465 cu_info->num_shader_engines = adev->gfx.config.max_shader_engines; in amdgpu_amdkfd_get_cu_info()
466 cu_info->num_shader_arrays_per_engine = adev->gfx.config.max_sh_per_se; in amdgpu_amdkfd_get_cu_info()
467 cu_info->num_cu_per_sh = adev->gfx.config.max_cu_per_sh; in amdgpu_amdkfd_get_cu_info()
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Damdgpu_atomfirmware.c655 adev->gfx.cu_info.wave_front_size = le16_to_cpu(gfx_info->v24.gc_wave_size); in amdgpu_atomfirmware_get_gfx_info()
656 adev->gfx.cu_info.max_waves_per_simd = le16_to_cpu(gfx_info->v24.gc_max_waves_per_simd); in amdgpu_atomfirmware_get_gfx_info()
657 adev->gfx.cu_info.max_scratch_slots_per_cu = gfx_info->v24.gc_max_scratch_slots_per_cu; in amdgpu_atomfirmware_get_gfx_info()
658 adev->gfx.cu_info.lds_size = le16_to_cpu(gfx_info->v24.gc_lds_size); in amdgpu_atomfirmware_get_gfx_info()
671 adev->gfx.cu_info.wave_front_size = le16_to_cpu(gfx_info->v27.gc_wave_size); in amdgpu_atomfirmware_get_gfx_info()
672 adev->gfx.cu_info.max_waves_per_simd = le16_to_cpu(gfx_info->v27.gc_max_waves_per_simd); in amdgpu_atomfirmware_get_gfx_info()
673 adev->gfx.cu_info.max_scratch_slots_per_cu = gfx_info->v27.gc_max_scratch_slots_per_cu; in amdgpu_atomfirmware_get_gfx_info()
674 adev->gfx.cu_info.lds_size = le16_to_cpu(gfx_info->v27.gc_lds_size); in amdgpu_atomfirmware_get_gfx_info()
Damdgpu_discovery.c443 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gc_info->gc_wave_size); in amdgpu_discovery_get_gfx_info()
444 adev->gfx.cu_info.max_waves_per_simd = le32_to_cpu(gc_info->gc_max_waves_per_simd); in amdgpu_discovery_get_gfx_info()
445 adev->gfx.cu_info.max_scratch_slots_per_cu = le32_to_cpu(gc_info->gc_max_scratch_slots_per_cu); in amdgpu_discovery_get_gfx_info()
446 adev->gfx.cu_info.lds_size = le32_to_cpu(gc_info->gc_lds_size); in amdgpu_discovery_get_gfx_info()
Dgfx_v9_4_2.c522 adev->gfx.cu_info.number, in gfx_v9_4_2_do_sgprs_init()
532 adev->gfx.cu_info.number * SIMD_ID_MAX * 2, in gfx_v9_4_2_do_sgprs_init()
547 adev->gfx.cu_info.number * 2, in gfx_v9_4_2_do_sgprs_init()
556 pattern[1], adev->gfx.cu_info.number * SIMD_ID_MAX * 6, in gfx_v9_4_2_do_sgprs_init()
587 adev->gfx.cu_info.number, in gfx_v9_4_2_do_sgprs_init()
597 adev->gfx.cu_info.number * SIMD_ID_MAX * 4, in gfx_v9_4_2_do_sgprs_init()
665 adev->gfx.cu_info.number, in gfx_v9_4_2_do_vgprs_init()
682 adev->gfx.cu_info.number * SIMD_ID_MAX, in gfx_v9_4_2_do_vgprs_init()
1834 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v9_4_2_log_cu_timeout_status() local
1846 simd = i / cu_info->max_waves_per_simd; in gfx_v9_4_2_log_cu_timeout_status()
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Damdgpu_kms.c844 dev_info->cu_active_number = adev->gfx.cu_info.number; in amdgpu_info_ioctl()
845 dev_info->cu_ao_mask = adev->gfx.cu_info.ao_cu_mask; in amdgpu_info_ioctl()
847 memcpy(&dev_info->cu_ao_bitmap[0], &adev->gfx.cu_info.ao_cu_bitmap[0], in amdgpu_info_ioctl()
848 sizeof(adev->gfx.cu_info.ao_cu_bitmap)); in amdgpu_info_ioctl()
849 memcpy(&dev_info->cu_bitmap[0], &adev->gfx.cu_info.bitmap[0], in amdgpu_info_ioctl()
850 sizeof(adev->gfx.cu_info.bitmap)); in amdgpu_info_ioctl()
856 dev_info->wave_front_size = adev->gfx.cu_info.wave_front_size; in amdgpu_info_ioctl()
Dgfx_v7_0.c3854 WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask); in gfx_v7_0_init_ao_cu_mask()
3858 tmp |= (adev->gfx.cu_info.number << RLC_MAX_PG_CU__MAX_POWERED_UP_CU__SHIFT); in gfx_v7_0_init_ao_cu_mask()
5165 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v7_0_get_cu_info() local
5174 memset(cu_info, 0, sizeof(*cu_info)); in gfx_v7_0_get_cu_info()
5189 cu_info->bitmap[i][j] = bitmap; in gfx_v7_0_get_cu_info()
5202 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v7_0_get_cu_info()
5208 cu_info->number = active_cu_number; in gfx_v7_0_get_cu_info()
5209 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v7_0_get_cu_info()
5210 cu_info->simd_per_cu = NUM_SIMD_PER_CU; in gfx_v7_0_get_cu_info()
5211 cu_info->max_waves_per_simd = 10; in gfx_v7_0_get_cu_info()
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Dgfx_v6_0.c2784 WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask); in gfx_v6_0_init_ao_cu_mask()
2788 tmp |= (adev->gfx.cu_info.number << RLC_MAX_PG_CU__MAX_POWERED_UP_CU__SHIFT); in gfx_v6_0_init_ao_cu_mask()
3594 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v6_0_get_cu_info() local
3603 memset(cu_info, 0, sizeof(*cu_info)); in gfx_v6_0_get_cu_info()
3618 cu_info->bitmap[i][j] = bitmap; in gfx_v6_0_get_cu_info()
3631 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v6_0_get_cu_info()
3638 cu_info->number = active_cu_number; in gfx_v6_0_get_cu_info()
3639 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v6_0_get_cu_info()
Damdgpu_amdkfd_gfx_v9.c881 *max_waves_per_cu = adev->gfx.cu_info.simd_per_cu * in kgd_gfx_v9_get_cu_occupancy()
882 adev->gfx.cu_info.max_waves_per_simd; in kgd_gfx_v9_get_cu_occupancy()
Damdgpu_amdkfd.h216 void amdgpu_amdkfd_get_cu_info(struct kgd_dev *kgd, struct kfd_cu_info *cu_info);
Damdgpu_gfx.h322 struct amdgpu_cu_info cu_info; member
Dgfx_v8_0.c4080 WREG32(mmRLC_PG_ALWAYS_ON_CU_MASK, adev->gfx.cu_info.ao_cu_mask); in gfx_v8_0_init_pg()
7137 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v8_0_get_cu_info() local
7141 memset(cu_info, 0, sizeof(*cu_info)); in gfx_v8_0_get_cu_info()
7161 cu_info->bitmap[i][j] = bitmap; in gfx_v8_0_get_cu_info()
7174 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v8_0_get_cu_info()
7180 cu_info->number = active_cu_number; in gfx_v8_0_get_cu_info()
7181 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v8_0_get_cu_info()
7182 cu_info->simd_per_cu = NUM_SIMD_PER_CU; in gfx_v8_0_get_cu_info()
7183 cu_info->max_waves_per_simd = 10; in gfx_v8_0_get_cu_info()
7184 cu_info->max_scratch_slots_per_cu = 32; in gfx_v8_0_get_cu_info()
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Dgfx_v9_0.c816 struct amdgpu_cu_info *cu_info);
1789 struct amdgpu_cu_info *cu_info = &adev->gfx.cu_info; in gfx_v9_0_init_always_on_cu_mask() local
1811 if (cu_info->bitmap[i][j] & mask) { in gfx_v9_0_init_always_on_cu_mask()
1824 cu_info->ao_cu_bitmap[i][j] = cu_bitmap; in gfx_v9_0_init_always_on_cu_mask()
2621 gfx_v9_0_get_cu_info(adev, &adev->gfx.cu_info); in gfx_v9_0_constants_init()
7130 struct amdgpu_cu_info *cu_info) in gfx_v9_0_get_cu_info() argument
7136 if (!adev || !cu_info) in gfx_v9_0_get_cu_info()
7173 cu_info->bitmap[i % 4][j + i / 4] = bitmap; in gfx_v9_0_get_cu_info()
7186 cu_info->ao_cu_bitmap[i % 4][j + i / 4] = ao_bitmap; in gfx_v9_0_get_cu_info()
7192 cu_info->number = active_cu_number; in gfx_v9_0_get_cu_info()
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Damdgpu_device.c2021 adev->gfx.cu_info.wave_front_size = le32_to_cpu(gpu_info_fw->gc_wave_size); in amdgpu_device_parse_gpu_info_fw()
2022 adev->gfx.cu_info.max_waves_per_simd = in amdgpu_device_parse_gpu_info_fw()
2024 adev->gfx.cu_info.max_scratch_slots_per_cu = in amdgpu_device_parse_gpu_info_fw()
2026 adev->gfx.cu_info.lds_size = le32_to_cpu(gpu_info_fw->gc_lds_size); in amdgpu_device_parse_gpu_info_fw()
3693 adev->gfx.cu_info.number); in amdgpu_device_init()
Dgfx_v10_0.c3593 struct amdgpu_cu_info *cu_info);
5273 gfx_v10_0_get_cu_info(adev, &adev->gfx.cu_info); in gfx_v10_0_constants_init()
9629 struct amdgpu_cu_info *cu_info) in gfx_v10_0_get_cu_info() argument
9635 if (!adev || !cu_info) in gfx_v10_0_get_cu_info()
9656 cu_info->bitmap[i][j] = bitmap; in gfx_v10_0_get_cu_info()
9669 cu_info->ao_cu_bitmap[i][j] = ao_bitmap; in gfx_v10_0_get_cu_info()
9675 cu_info->number = active_cu_number; in gfx_v10_0_get_cu_info()
9676 cu_info->ao_cu_mask = ao_cu_mask; in gfx_v10_0_get_cu_info()
9677 cu_info->simd_per_cu = NUM_SIMD_PER_CU; in gfx_v10_0_get_cu_info()
/Linux-v5.15/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dsmu7_clockpowergating.c431 adev->gfx.cu_info.number, in smu7_powergate_gfx()
Dvega12_hwmgr.c431 data->total_active_cus = adev->gfx.cu_info.number; in vega12_hwmgr_backend_init()
Dvega20_hwmgr.c473 data->total_active_cus = adev->gfx.cu_info.number; in vega20_hwmgr_backend_init()
Dvega10_hwmgr.c915 data->total_active_cus = adev->gfx.cu_info.number; in vega10_hwmgr_backend_init()
/Linux-v5.15/drivers/net/ethernet/mellanox/mlxsw/
Dspectrum.c4582 struct netdev_notifier_changeupper_info *cu_info; in mlxsw_sp_netdevice_vxlan_event() local
4591 cu_info = container_of(info, in mlxsw_sp_netdevice_vxlan_event()
4594 upper_dev = cu_info->upper_dev; in mlxsw_sp_netdevice_vxlan_event()
4601 if (cu_info->linking) { in mlxsw_sp_netdevice_vxlan_event()
/Linux-v5.15/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dvangogh_ppt.c2014 uint32_t req_active_wgps = adev->gfx.cu_info.number/2; in vangogh_post_smu_init()
2032 if (total_cu == adev->gfx.cu_info.number) in vangogh_post_smu_init()
/Linux-v5.15/drivers/gpu/drm/amd/pm/powerplay/smumgr/
Dvegam_smumgr.c1912 adev->gfx.cu_info.number, in vegam_enable_reconfig_cus()