Searched refs:csels (Results 1 – 2 of 2) sorted by relevance
392 csbase = pvt->csels[dct].csbases[csrow]; in get_cs_base_and_mask()393 csmask = pvt->csels[dct].csmasks[csrow]; in get_cs_base_and_mask()404 csbase = pvt->csels[dct].csbases[csrow]; in get_cs_base_and_mask()405 csmask = pvt->csels[dct].csmasks[csrow >> 1]; in get_cs_base_and_mask()420 csbase = pvt->csels[dct].csbases[csrow]; in get_cs_base_and_mask()421 csmask = pvt->csels[dct].csmasks[csrow >> 1]; in get_cs_base_and_mask()442 for (i = 0; i < pvt->csels[dct].b_cnt; i++)445 pvt->csels[dct].csbases[i]448 for (i = 0; i < pvt->csels[dct].m_cnt; i++)1037 u32 dcsm = pvt->csels[chan].csmasks[0]; in debug_dump_dramcfg_low()[all …]
178 #define csrow_enabled(i, dct, pvt) ((pvt)->csels[(dct)].csbases[(i)] & DCSB_CS_ENABLE)179 #define csrow_sec_enabled(i, dct, pvt) ((pvt)->csels[(dct)].csbases_sec[(i)] & DCSB_CS_ENABLE)370 struct chip_select csels[NUM_CONTROLLERS]; member
