| /Linux-v5.15/drivers/gpu/drm/i915/display/ |
| D | intel_color.c | 119 static bool crtc_state_is_legacy_gamma(const struct intel_crtc_state *crtc_state) in crtc_state_is_legacy_gamma() argument
121 return !crtc_state->hw.degamma_lut && in crtc_state_is_legacy_gamma()
122 !crtc_state->hw.ctm && in crtc_state_is_legacy_gamma()
123 crtc_state->hw.gamma_lut && in crtc_state_is_legacy_gamma()
124 lut_is_legacy(crtc_state->hw.gamma_lut); in crtc_state_is_legacy_gamma()
219 static bool ilk_csc_limited_range(const struct intel_crtc_state *crtc_state) in ilk_csc_limited_range() argument
221 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); in ilk_csc_limited_range()
227 return crtc_state->limited_color_range && in ilk_csc_limited_range()
232 static void ilk_csc_convert_ctm(const struct intel_crtc_state *crtc_state, in ilk_csc_convert_ctm() argument
235 const struct drm_color_ctm *ctm = crtc_state->hw.ctm->data; in ilk_csc_convert_ctm()
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| D | intel_vrr.c | 65 static int intel_vrr_vblank_exit_length(const struct intel_crtc_state *crtc_state) in intel_vrr_vblank_exit_length() argument
67 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_vrr_vblank_exit_length()
72 return crtc_state->vrr.guardband + i915->framestart_delay + 1; in intel_vrr_vblank_exit_length()
74 return crtc_state->vrr.pipeline_full + i915->framestart_delay + 1; in intel_vrr_vblank_exit_length()
77 int intel_vrr_vmin_vblank_start(const struct intel_crtc_state *crtc_state) in intel_vrr_vmin_vblank_start() argument
80 return crtc_state->vrr.vmin + 1 - intel_vrr_vblank_exit_length(crtc_state); in intel_vrr_vmin_vblank_start()
83 int intel_vrr_vmax_vblank_start(const struct intel_crtc_state *crtc_state) in intel_vrr_vmax_vblank_start() argument
85 return crtc_state->vrr.vmax - intel_vrr_vblank_exit_length(crtc_state); in intel_vrr_vmax_vblank_start()
89 intel_vrr_compute_config(struct intel_crtc_state *crtc_state, in intel_vrr_compute_config() argument
92 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_vrr_compute_config()
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| D | intel_atomic.c | 123 struct drm_crtc_state *crtc_state; in intel_digital_connector_atomic_check() local
130 crtc_state = drm_atomic_get_new_crtc_state(state, new_state->crtc); in intel_digital_connector_atomic_check()
143 crtc_state->mode_changed = true; in intel_digital_connector_atomic_check()
199 struct intel_crtc_state *crtc_state; in intel_any_crtc_needs_modeset() local
202 for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { in intel_any_crtc_needs_modeset()
203 if (intel_crtc_needs_modeset(crtc_state)) in intel_any_crtc_needs_modeset()
237 struct intel_crtc_state *crtc_state; in intel_crtc_duplicate_state() local
239 crtc_state = kmemdup(old_crtc_state, sizeof(*crtc_state), GFP_KERNEL); in intel_crtc_duplicate_state()
240 if (!crtc_state) in intel_crtc_duplicate_state()
243 __drm_atomic_helper_crtc_duplicate_state(crtc, &crtc_state->uapi); in intel_crtc_duplicate_state()
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| D | intel_vdsc.c | 337 bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state) in intel_dsc_source_support() argument
339 const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_dsc_source_support()
341 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in intel_dsc_source_support()
360 static bool is_pipe_dsc(const struct intel_crtc_state *crtc_state) in is_pipe_dsc() argument
362 const struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in is_pipe_dsc()
364 enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; in is_pipe_dsc()
550 intel_dsc_power_domain(const struct intel_crtc_state *crtc_state) in intel_dsc_power_domain() argument
552 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_dsc_power_domain()
569 else if (is_pipe_dsc(crtc_state)) in intel_dsc_power_domain()
575 static void intel_dsc_pps_configure(const struct intel_crtc_state *crtc_state) in intel_dsc_pps_configure() argument
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| D | intel_ddi.c | 76 const struct intel_crtc_state *crtc_state) in intel_ddi_hdmi_level() argument
81 n_entries = intel_ddi_hdmi_num_entries(encoder, crtc_state, &default_entry); in intel_ddi_hdmi_level()
100 const struct intel_crtc_state *crtc_state) in hsw_prepare_dp_ddi_buffers() argument
108 ddi_translations = encoder->get_buf_trans(encoder, crtc_state, &n_entries); in hsw_prepare_dp_ddi_buffers()
131 const struct intel_crtc_state *crtc_state, in hsw_prepare_hdmi_ddi_buffers() argument
140 ddi_translations = encoder->get_buf_trans(encoder, crtc_state, &n_entries); in hsw_prepare_hdmi_ddi_buffers()
213 const struct intel_crtc_state *crtc_state) in icl_pll_to_ddi_clk_sel() argument
215 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_pll_to_ddi_clk_sel()
216 int clock = crtc_state->port_clock; in icl_pll_to_ddi_clk_sel()
277 const struct intel_crtc_state *crtc_state) in intel_ddi_init_dp_buf_reg() argument
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| D | intel_ddi_buf_trans.c | 1000 const struct intel_crtc_state *crtc_state, in hsw_get_buf_trans() argument
1003 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) in hsw_get_buf_trans()
1005 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in hsw_get_buf_trans()
1013 const struct intel_crtc_state *crtc_state, in bdw_get_buf_trans() argument
1018 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_ANALOG)) in bdw_get_buf_trans()
1020 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in bdw_get_buf_trans()
1022 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) && in bdw_get_buf_trans()
1050 const struct intel_crtc_state *crtc_state, in skl_y_get_buf_trans() argument
1055 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI)) in skl_y_get_buf_trans()
1057 else if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_EDP) && in skl_y_get_buf_trans()
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| D | intel_dp_link_training.c | 260 const struct intel_crtc_state *crtc_state, in intel_dp_phy_voltage_max() argument
271 voltage_max = intel_dp->voltage_max(intel_dp, crtc_state); in intel_dp_phy_voltage_max()
306 const struct intel_crtc_state *crtc_state, in intel_dp_get_adjust_train() argument
316 for (lane = 0; lane < crtc_state->lane_count; lane++) { in intel_dp_get_adjust_train()
327 voltage_max = intel_dp_phy_voltage_max(intel_dp, crtc_state, dp_phy); in intel_dp_get_adjust_train()
345 const struct intel_crtc_state *crtc_state, in intel_dp_set_link_train() argument
353 intel_dp_program_link_training_pattern(intel_dp, crtc_state, in intel_dp_set_link_train()
358 memcpy(buf + 1, intel_dp->train_set, crtc_state->lane_count); in intel_dp_set_link_train()
359 len = crtc_state->lane_count + 1; in intel_dp_set_link_train()
381 const struct intel_crtc_state *crtc_state, in intel_dp_program_link_training_pattern() argument
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| D | intel_ddi.h | 24 const struct intel_crtc_state *crtc_state);
26 const struct intel_crtc_state *crtc_state);
32 const struct intel_crtc_state *crtc_state);
34 struct intel_crtc_state *crtc_state,
37 const struct intel_crtc_state *crtc_state);
41 struct intel_crtc_state *crtc_state);
44 const struct intel_crtc_state *crtc_state);
50 const struct intel_crtc_state *crtc_state);
51 void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);
53 const struct intel_crtc_state *crtc_state);
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| D | intel_dpll.c | 395 const struct intel_crtc_state *crtc_state, in i9xx_select_p2_div() argument
398 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); in i9xx_select_p2_div()
400 if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_LVDS)) { in i9xx_select_p2_div()
430 struct intel_crtc_state *crtc_state, in i9xx_find_best_dpll() argument
434 struct drm_device *dev = crtc_state->uapi.crtc->dev; in i9xx_find_best_dpll()
440 clock.p2 = i9xx_select_p2_div(limit, crtc_state, target); in i9xx_find_best_dpll()
488 struct intel_crtc_state *crtc_state, in pnv_find_best_dpll() argument
492 struct drm_device *dev = crtc_state->uapi.crtc->dev; in pnv_find_best_dpll()
498 clock.p2 = i9xx_select_p2_div(limit, crtc_state, target); in pnv_find_best_dpll()
544 struct intel_crtc_state *crtc_state, in g4x_find_best_dpll() argument
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| D | intel_dp.h | 37 bool intel_dp_limited_color_range(const struct intel_crtc_state *crtc_state,
50 const struct intel_crtc_state *crtc_state);
52 const struct intel_crtc_state *crtc_state,
64 void intel_edp_backlight_on(const struct intel_crtc_state *crtc_state,
74 const struct intel_crtc_state *crtc_state);
76 const struct intel_crtc_state *crtc_state);
78 const struct intel_crtc_state *crtc_state);
93 bool intel_dp_needs_vsc_sdp(const struct intel_crtc_state *crtc_state,
96 const struct intel_crtc_state *crtc_state,
100 const struct intel_crtc_state *crtc_state,
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| D | intel_hdmi.c | 196 const struct intel_crtc_state *crtc_state, in g4x_write_infoframe() argument
232 const struct intel_crtc_state *crtc_state, in g4x_read_infoframe() argument
268 const struct intel_crtc_state *crtc_state, in ibx_write_infoframe() argument
274 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ibx_write_infoframe()
307 const struct intel_crtc_state *crtc_state, in ibx_read_infoframe() argument
312 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in ibx_read_infoframe()
347 const struct intel_crtc_state *crtc_state, in cpt_write_infoframe() argument
353 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in cpt_write_infoframe()
389 const struct intel_crtc_state *crtc_state, in cpt_read_infoframe() argument
394 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in cpt_read_infoframe()
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| D | skl_scaler.c | 91 skl_update_scaler(struct intel_crtc_state *crtc_state, bool force_detach, in skl_update_scaler() argument
98 &crtc_state->scaler_state; in skl_update_scaler()
99 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in skl_update_scaler()
102 &crtc_state->hw.adjusted_mode; in skl_update_scaler()
118 if (DISPLAY_VER(dev_priv) >= 9 && crtc_state->hw.enable && in skl_update_scaler()
184 int skl_update_scaler_crtc(struct intel_crtc_state *crtc_state) in skl_update_scaler_crtc() argument
186 const struct drm_display_mode *pipe_mode = &crtc_state->hw.pipe_mode; in skl_update_scaler_crtc()
189 if (crtc_state->pch_pfit.enabled) { in skl_update_scaler_crtc()
190 width = drm_rect_width(&crtc_state->pch_pfit.dst); in skl_update_scaler_crtc()
191 height = drm_rect_height(&crtc_state->pch_pfit.dst); in skl_update_scaler_crtc()
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| D | intel_display.c | 116 static void intel_set_transcoder_timings(const struct intel_crtc_state *crtc_state);
117 static void intel_set_pipe_src_size(const struct intel_crtc_state *crtc_state);
118 static void intel_cpu_transcoder_set_m_n(const struct intel_crtc_state *crtc_state,
121 static void i9xx_set_pipeconf(const struct intel_crtc_state *crtc_state);
122 static void ilk_set_pipeconf(const struct intel_crtc_state *crtc_state);
123 static void hsw_set_pipeconf(const struct intel_crtc_state *crtc_state);
124 static void bdw_set_pipemisc(const struct intel_crtc_state *crtc_state);
125 static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state);
388 is_trans_port_sync_slave(const struct intel_crtc_state *crtc_state) in is_trans_port_sync_slave() argument
390 return crtc_state->master_transcoder != INVALID_TRANSCODER; in is_trans_port_sync_slave()
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| D | intel_vdsc.h | 14 bool intel_dsc_source_support(const struct intel_crtc_state *crtc_state);
15 void intel_uncompressed_joiner_enable(const struct intel_crtc_state *crtc_state);
17 const struct intel_crtc_state *crtc_state);
18 void intel_dsc_disable(const struct intel_crtc_state *crtc_state);
21 void intel_uncompressed_joiner_get_config(struct intel_crtc_state *crtc_state);
22 void intel_dsc_get_config(struct intel_crtc_state *crtc_state);
24 intel_dsc_power_domain(const struct intel_crtc_state *crtc_state);
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| D | intel_crtc.c | 51 u32 intel_crtc_max_vblank_count(const struct intel_crtc_state *crtc_state) in intel_crtc_max_vblank_count() argument
53 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); in intel_crtc_max_vblank_count()
61 if (crtc_state->mode_flags & (I915_MODE_FLAG_DSI_USE_TE0 | in intel_crtc_max_vblank_count()
70 (crtc_state->output_types & BIT(INTEL_OUTPUT_TVOUT))) in intel_crtc_max_vblank_count()
81 void intel_crtc_vblank_on(const struct intel_crtc_state *crtc_state) in intel_crtc_vblank_on() argument
83 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_crtc_vblank_on()
87 intel_crtc_max_vblank_count(crtc_state)); in intel_crtc_vblank_on()
98 void intel_crtc_vblank_off(const struct intel_crtc_state *crtc_state) in intel_crtc_vblank_off() argument
100 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_crtc_vblank_off()
115 struct intel_crtc_state *crtc_state; in intel_crtc_state_alloc() local
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| D | intel_dsb.c | 93 void intel_dsb_indexed_reg_write(const struct intel_crtc_state *crtc_state, in intel_dsb_indexed_reg_write() argument
96 struct intel_dsb *dsb = crtc_state->dsb; in intel_dsb_indexed_reg_write()
97 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_dsb_indexed_reg_write()
170 void intel_dsb_reg_write(const struct intel_crtc_state *crtc_state, in intel_dsb_reg_write() argument
173 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_dsb_reg_write()
178 dsb = crtc_state->dsb; in intel_dsb_reg_write()
204 void intel_dsb_commit(const struct intel_crtc_state *crtc_state) in intel_dsb_commit() argument
206 struct intel_dsb *dsb = crtc_state->dsb; in intel_dsb_commit()
207 struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc); in intel_dsb_commit()
261 void intel_dsb_prepare(struct intel_crtc_state *crtc_state) in intel_dsb_prepare() argument
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| D | intel_psr.c | 697 struct intel_crtc_state *crtc_state) in dc3co_is_pipe_port_compatible() argument
700 enum pipe pipe = to_intel_crtc(crtc_state->uapi.crtc)->pipe; in dc3co_is_pipe_port_compatible()
712 struct intel_crtc_state *crtc_state) in tgl_dc3co_exitline_compute_config() argument
714 const u32 crtc_vdisplay = crtc_state->uapi.adjusted_mode.crtc_vdisplay; in tgl_dc3co_exitline_compute_config()
729 if (crtc_state->enable_psr2_sel_fetch) in tgl_dc3co_exitline_compute_config()
735 if (!dc3co_is_pipe_port_compatible(intel_dp, crtc_state)) in tgl_dc3co_exitline_compute_config()
747 intel_usecs_to_scanlines(&crtc_state->uapi.adjusted_mode, 200) + 1; in tgl_dc3co_exitline_compute_config()
752 crtc_state->dc3co_exitline = crtc_vdisplay - exit_scanlines; in tgl_dc3co_exitline_compute_config()
756 struct intel_crtc_state *crtc_state) in intel_psr2_sel_fetch_config_valid() argument
758 struct intel_atomic_state *state = to_intel_atomic_state(crtc_state->uapi.state); in intel_psr2_sel_fetch_config_valid()
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| D | intel_dp_mst.c | 48 struct intel_crtc_state *crtc_state, in intel_dp_mst_compute_link_config() argument
52 struct drm_atomic_state *state = crtc_state->uapi.state; in intel_dp_mst_compute_link_config()
59 &crtc_state->hw.adjusted_mode; in intel_dp_mst_compute_link_config()
63 crtc_state->lane_count = limits->max_lane_count; in intel_dp_mst_compute_link_config()
64 crtc_state->port_clock = limits->max_clock; in intel_dp_mst_compute_link_config()
67 crtc_state->pipe_bpp = bpp; in intel_dp_mst_compute_link_config()
69 crtc_state->pbn = drm_dp_calc_pbn_mode(adjusted_mode->crtc_clock, in intel_dp_mst_compute_link_config()
70 crtc_state->pipe_bpp, in intel_dp_mst_compute_link_config()
75 crtc_state->pbn, in intel_dp_mst_compute_link_config()
77 crtc_state->port_clock, in intel_dp_mst_compute_link_config()
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| D | intel_audio.c | 126 audio_config_dp_get_n_m(const struct intel_crtc_state *crtc_state, int rate) in audio_config_dp_get_n_m() argument
132 crtc_state->port_clock == dp_aud_n_m[i].clock) in audio_config_dp_get_n_m()
240 static u32 audio_config_hdmi_pixel_clock(const struct intel_crtc_state *crtc_state) in audio_config_hdmi_pixel_clock() argument
242 struct drm_i915_private *dev_priv = to_i915(crtc_state->uapi.crtc->dev); in audio_config_hdmi_pixel_clock()
244 &crtc_state->hw.adjusted_mode; in audio_config_hdmi_pixel_clock()
270 static int audio_config_hdmi_get_n(const struct intel_crtc_state *crtc_state, in audio_config_hdmi_get_n() argument
276 if (crtc_state->pipe_bpp == 36) { in audio_config_hdmi_get_n()
279 } else if (crtc_state->pipe_bpp == 30) { in audio_config_hdmi_get_n()
289 crtc_state->port_clock == hdmi_ncts_table[i].clock) { in audio_config_hdmi_get_n()
345 const struct intel_crtc_state *crtc_state, in g4x_audio_codec_enable() argument
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| D | intel_cursor.c | 136 static int intel_check_cursor(struct intel_crtc_state *crtc_state, in intel_check_cursor() argument
150 ret = intel_atomic_plane_check_clipping(plane_state, crtc_state, in intel_check_cursor()
183 static u32 i845_cursor_ctl_crtc(const struct intel_crtc_state *crtc_state) in i845_cursor_ctl_crtc() argument
187 if (crtc_state->gamma_enable) in i845_cursor_ctl_crtc()
193 static u32 i845_cursor_ctl(const struct intel_crtc_state *crtc_state, in i845_cursor_ctl() argument
212 static int i845_check_cursor(struct intel_crtc_state *crtc_state, in i845_check_cursor() argument
219 ret = intel_check_cursor(crtc_state, plane_state); in i845_check_cursor()
251 plane_state->ctl = i845_cursor_ctl(crtc_state, plane_state); in i845_check_cursor()
257 const struct intel_crtc_state *crtc_state, in i845_update_cursor() argument
269 i845_cursor_ctl_crtc(crtc_state); in i845_update_cursor()
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| D | intel_atomic_plane.c | 158 unsigned int intel_plane_pixel_rate(const struct intel_crtc_state *crtc_state, in intel_plane_pixel_rate() argument
175 crtc_state->pixel_rate); in intel_plane_pixel_rate()
178 unsigned int intel_plane_data_rate(const struct intel_crtc_state *crtc_state, in intel_plane_data_rate() argument
188 pixel_rate = intel_plane_pixel_rate(crtc_state, plane_state); in intel_plane_data_rate()
314 void intel_plane_set_invisible(struct intel_crtc_state *crtc_state, in intel_plane_set_invisible() argument
319 crtc_state->active_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
320 crtc_state->nv12_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
321 crtc_state->c8_planes &= ~BIT(plane->id); in intel_plane_set_invisible()
322 crtc_state->data_rate[plane->id] = 0; in intel_plane_set_invisible()
323 crtc_state->min_cdclk[plane->id] = 0; in intel_plane_set_invisible()
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| D | intel_atomic_plane.h | 23 unsigned int intel_plane_pixel_rate(const struct intel_crtc_state *crtc_state,
26 unsigned int intel_plane_data_rate(const struct intel_crtc_state *crtc_state,
34 const struct intel_crtc_state *crtc_state,
37 const struct intel_crtc_state *crtc_state);
48 struct intel_crtc_state *crtc_state,
54 struct intel_crtc_state *crtc_state,
61 struct intel_crtc_state *crtc_state,
64 void intel_plane_set_invisible(struct intel_crtc_state *crtc_state,
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| /Linux-v5.15/drivers/gpu/drm/gma500/ |
| D | gma_display.c | 501 kfree(gma_crtc->crtc_state); in gma_crtc_destroy()
577 struct psb_intel_crtc_state *crtc_state = gma_crtc->crtc_state; in gma_crtc_save() local
582 if (!crtc_state) { in gma_crtc_save()
587 crtc_state->saveDSPCNTR = REG_READ(map->cntr); in gma_crtc_save()
588 crtc_state->savePIPECONF = REG_READ(map->conf); in gma_crtc_save()
589 crtc_state->savePIPESRC = REG_READ(map->src); in gma_crtc_save()
590 crtc_state->saveFP0 = REG_READ(map->fp0); in gma_crtc_save()
591 crtc_state->saveFP1 = REG_READ(map->fp1); in gma_crtc_save()
592 crtc_state->saveDPLL = REG_READ(map->dpll); in gma_crtc_save()
593 crtc_state->saveHTOTAL = REG_READ(map->htotal); in gma_crtc_save()
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| /Linux-v5.15/drivers/gpu/drm/ |
| D | drm_self_refresh_helper.c | 78 struct drm_crtc_state *crtc_state; in drm_self_refresh_helper_entry_work() local
92 crtc_state = drm_atomic_get_crtc_state(state, crtc); in drm_self_refresh_helper_entry_work()
93 if (IS_ERR(crtc_state)) { in drm_self_refresh_helper_entry_work()
94 ret = PTR_ERR(crtc_state); in drm_self_refresh_helper_entry_work()
98 if (!crtc_state->enable) in drm_self_refresh_helper_entry_work()
110 crtc_state->active = false; in drm_self_refresh_helper_entry_work()
111 crtc_state->self_refresh_active = true; in drm_self_refresh_helper_entry_work()
190 struct drm_crtc_state *crtc_state; in drm_self_refresh_helper_alter_state() local
194 for_each_old_crtc_in_state(state, crtc, crtc_state, i) { in drm_self_refresh_helper_alter_state()
195 if (crtc_state->self_refresh_active) { in drm_self_refresh_helper_alter_state()
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| /Linux-v5.15/drivers/gpu/drm/vkms/ |
| D | vkms_composer.c | 175 struct vkms_crtc_state *crtc_state) in compose_active_planes() argument
201 for (i = 1; i < crtc_state->num_active_planes; i++) in compose_active_planes()
203 crtc_state->active_planes[i]->composer, in compose_active_planes()
220 struct vkms_crtc_state *crtc_state = container_of(work, in vkms_composer_worker() local
223 struct drm_crtc *crtc = crtc_state->base.crtc; in vkms_composer_worker()
234 frame_start = crtc_state->frame_start; in vkms_composer_worker()
235 frame_end = crtc_state->frame_end; in vkms_composer_worker()
236 crc_pending = crtc_state->crc_pending; in vkms_composer_worker()
237 wb_pending = crtc_state->wb_pending; in vkms_composer_worker()
238 crtc_state->frame_start = 0; in vkms_composer_worker()
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