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Searched refs:cptpf (Results 1 – 8 of 8) sorted by relevance

/Linux-v5.15/drivers/crypto/marvell/octeontx2/
Dotx2_cptpf_main.c15 static void cptpf_enable_vfpf_mbox_intr(struct otx2_cptpf_dev *cptpf, in cptpf_enable_vfpf_mbox_intr() argument
21 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr()
23 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr()
28 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr()
35 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_enable_vfpf_mbox_intr()
41 static void cptpf_disable_vfpf_mbox_intr(struct otx2_cptpf_dev *cptpf, in cptpf_disable_vfpf_mbox_intr() argument
47 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr()
49 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr()
52 otx2_cpt_write64(cptpf->reg_base, BLKADDR_RVUM, 0, in cptpf_disable_vfpf_mbox_intr()
55 vector = pci_irq_vector(cptpf->pdev, RVU_PF_INT_VEC_VFPF_MBOX0); in cptpf_disable_vfpf_mbox_intr()
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Dotx2_cptpf_mbox.c14 static int forward_to_af(struct otx2_cptpf_dev *cptpf, in forward_to_af() argument
21 msg = otx2_mbox_alloc_msg(&cptpf->afpf_mbox, 0, size); in forward_to_af()
32 otx2_mbox_msg_send(&cptpf->afpf_mbox, 0); in forward_to_af()
33 ret = otx2_mbox_wait_for_rsp(&cptpf->afpf_mbox, 0); in forward_to_af()
35 dev_err(&cptpf->pdev->dev, "RVU MBOX timeout.\n"); in forward_to_af()
38 dev_err(&cptpf->pdev->dev, "RVU MBOX error: %d.\n", ret); in forward_to_af()
44 static int handle_msg_get_caps(struct otx2_cptpf_dev *cptpf, in handle_msg_get_caps() argument
51 otx2_mbox_alloc_msg(&cptpf->vfpf_mbox, vf->vf_id, in handle_msg_get_caps()
60 rsp->cpt_revision = cptpf->pdev->revision; in handle_msg_get_caps()
61 memcpy(&rsp->eng_caps, &cptpf->eng_caps, sizeof(rsp->eng_caps)); in handle_msg_get_caps()
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Dotx2_cptpf_ucode.c121 struct otx2_cptpf_dev *cptpf = dev_get_drvdata(dev); in get_ucode_type() local
124 struct pci_dev *pdev = cptpf->pdev; in get_ucode_type()
157 static int __write_ucode_base(struct otx2_cptpf_dev *cptpf, int eng, in __write_ucode_base() argument
160 return otx2_cpt_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in __write_ucode_base()
166 struct otx2_cptpf_dev *cptpf, int blkaddr) in cptx_set_ucode_base() argument
173 ret = otx2_cpt_write_af_reg(&cptpf->afpf_mbox, cptpf->pdev, in cptx_set_ucode_base()
175 cptpf->pf_id << RVU_PFVF_PF_SHIFT, blkaddr); in cptx_set_ucode_base()
192 ret = __write_ucode_base(cptpf, bit, dma_addr, in cptx_set_ucode_base()
203 struct otx2_cptpf_dev *cptpf = obj; in cpt_set_ucode_base() local
206 if (cptpf->has_cpt1) { in cpt_set_ucode_base()
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Dcn10k_cpt.c43 int cn10k_cptpf_lmtst_init(struct otx2_cptpf_dev *cptpf) in cn10k_cptpf_lmtst_init() argument
45 struct pci_dev *pdev = cptpf->pdev; in cn10k_cptpf_lmtst_init()
49 if (!test_bit(CN10K_LMTST, &cptpf->cap_flag)) { in cn10k_cptpf_lmtst_init()
50 cptpf->lfs.ops = &otx2_hw_ops; in cn10k_cptpf_lmtst_init()
54 cptpf->lfs.ops = &cn10k_hw_ops; in cn10k_cptpf_lmtst_init()
55 lmt_base = readq(cptpf->reg_base + RVU_PF_LMTLINE_ADDR); in cn10k_cptpf_lmtst_init()
61 size -= ((1 + cptpf->max_vfs) * MBOX_SIZE); in cn10k_cptpf_lmtst_init()
62 cptpf->lfs.lmt_base = devm_ioremap_wc(&pdev->dev, lmt_base, size); in cn10k_cptpf_lmtst_init()
63 if (!cptpf->lfs.lmt_base) { in cn10k_cptpf_lmtst_init()
Dotx2_cptpf_ucode.h158 int otx2_cpt_create_eng_grps(struct otx2_cptpf_dev *cptpf,
160 int otx2_cpt_disable_all_cores(struct otx2_cptpf_dev *cptpf);
162 int otx2_cpt_discover_eng_capabilities(struct otx2_cptpf_dev *cptpf);
Dcn10k_cpt.h33 int cn10k_cptpf_lmtst_init(struct otx2_cptpf_dev *cptpf);
Dotx2_cptpf.h14 struct otx2_cptpf_dev *cptpf; /* PF pointer this VF belongs to */ member
/Linux-v5.15/drivers/crypto/cavium/cpt/
DMakefile2 obj-$(CONFIG_CAVIUM_CPT) += cptpf.o cptvf.o
3 cptpf-objs := cptpf_main.o cptpf_mbox.o