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Searched refs:cp_hqd_pq_control (Results 1 – 17 of 17) sorted by relevance

/Linux-v5.15/drivers/gpu/drm/amd/amdkfd/
Dkfd_mqd_manager_cik.c193 m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE | in __update_mqd()
197 m->cp_hqd_pq_control |= PQ_ATC_EN; in __update_mqd()
205 m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1; in __update_mqd()
215 m->cp_hqd_pq_control |= NO_UPDATE_RPTR; in __update_mqd()
326 m->cp_hqd_pq_control = DEFAULT_RPTR_BLOCK_SIZE | in update_mqd_hiq()
335 m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1; in update_mqd_hiq()
Dkfd_mqd_manager_v10.c171 m->cp_hqd_pq_control = 5 << CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE__SHIFT; in update_mqd()
172 m->cp_hqd_pq_control |= in update_mqd()
174 pr_debug("cp_hqd_pq_control 0x%x\n", m->cp_hqd_pq_control); in update_mqd()
212 m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK | in update_mqd()
296 m->cp_hqd_pq_control |= 1 << CP_HQD_PQ_CONTROL__PRIV_STATE__SHIFT | in init_mqd_hiq()
Dkfd_mqd_manager_v9.c221 m->cp_hqd_pq_control = 5 << CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE__SHIFT; in update_mqd()
222 m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1; in update_mqd()
223 pr_debug("cp_hqd_pq_control 0x%x\n", m->cp_hqd_pq_control); in update_mqd()
262 m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK | in update_mqd()
351 m->cp_hqd_pq_control |= 1 << CP_HQD_PQ_CONTROL__PRIV_STATE__SHIFT | in init_mqd_hiq()
Dkfd_mqd_manager_vi.c177 m->cp_hqd_pq_control = 5 << CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE__SHIFT | in __update_mqd()
180 m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1; in __update_mqd()
181 pr_debug("cp_hqd_pq_control 0x%x\n", m->cp_hqd_pq_control); in __update_mqd()
224 m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK | in __update_mqd()
315 m->cp_hqd_pq_control |= 1 << CP_HQD_PQ_CONTROL__PRIV_STATE__SHIFT | in init_mqd_hiq()
/Linux-v5.15/drivers/gpu/drm/amd/include/
Dcik_structs.h96 uint32_t cp_hqd_pq_control; member
Dvi_structs.h305 uint32_t cp_hqd_pq_control; member
Dv9_structs.h305 uint32_t cp_hqd_pq_control; member
Dv10_structs.h822 uint32_t cp_hqd_pq_control; member
/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Dmes_v10_1.c673 mqd->cp_hqd_pq_control = tmp; in mes_v10_1_mqd_init()
764 WREG32_SOC15(GC, 0, mmCP_HQD_PQ_CONTROL, mqd->cp_hqd_pq_control); in mes_v10_1_queue_init_register()
Dgfx_v7_0.c2849 u32 cp_hqd_pq_control; member
2962 mqd->cp_hqd_pq_control = RREG32(mmCP_HQD_PQ_CONTROL); in gfx_v7_0_mqd_init()
2963 mqd->cp_hqd_pq_control &= in gfx_v7_0_mqd_init()
2967 mqd->cp_hqd_pq_control |= in gfx_v7_0_mqd_init()
2969 mqd->cp_hqd_pq_control |= in gfx_v7_0_mqd_init()
2972 mqd->cp_hqd_pq_control |= in gfx_v7_0_mqd_init()
2975 mqd->cp_hqd_pq_control &= in gfx_v7_0_mqd_init()
2979 mqd->cp_hqd_pq_control |= in gfx_v7_0_mqd_init()
Damdgpu_amdkfd_gfx_v10.c268 2 << REG_GET_FIELD(m->cp_hqd_pq_control, in kgd_hqd_load()
Damdgpu_amdkfd_gfx_v9.c282 2 << REG_GET_FIELD(m->cp_hqd_pq_control, in kgd_gfx_v9_hqd_load()
Damdgpu_amdkfd_gfx_v10_3.c253 2 << REG_GET_FIELD(m->cp_hqd_pq_control, in hqd_load_v10_3()
Dgfx_v9_0.c3554 mqd->cp_hqd_pq_control = tmp; in gfx_v9_0_mqd_init()
3671 mqd->cp_hqd_pq_control); in gfx_v9_0_kiq_init_register()
3781 if (amdgpu_in_reset(adev) && tmp_mqd->cp_hqd_pq_control){ in gfx_v9_0_kiq_init_queue()
3825 if (!tmp_mqd->cp_hqd_pq_control || in gfx_v9_0_kcq_init_queue()
Dgfx_v10_0.c6950 mqd->cp_hqd_pq_control = tmp; in gfx_v10_0_compute_mqd_init()
7071 mqd->cp_hqd_pq_control); in gfx_v10_0_kiq_init_register()
Dgfx_v8_0.c4517 mqd->cp_hqd_pq_control = tmp; in gfx_v8_0_mqd_init()
/Linux-v5.15/drivers/gpu/drm/radeon/
Dcik.c4451 u32 cp_hqd_pq_control; member
4658 mqd->queue_state.cp_hqd_pq_control = RREG32(CP_HQD_PQ_CONTROL); in cik_cp_compute_resume()
4659 mqd->queue_state.cp_hqd_pq_control &= in cik_cp_compute_resume()
4662 mqd->queue_state.cp_hqd_pq_control |= in cik_cp_compute_resume()
4664 mqd->queue_state.cp_hqd_pq_control |= in cik_cp_compute_resume()
4667 mqd->queue_state.cp_hqd_pq_control |= BUF_SWAP_32BIT; in cik_cp_compute_resume()
4669 mqd->queue_state.cp_hqd_pq_control &= in cik_cp_compute_resume()
4671 mqd->queue_state.cp_hqd_pq_control |= in cik_cp_compute_resume()
4673 WREG32(CP_HQD_PQ_CONTROL, mqd->queue_state.cp_hqd_pq_control); in cik_cp_compute_resume()