Searched refs:clock_ranges (Results 1 – 16 of 16) sorted by relevance
487 struct pp_smu_wm_range_sets *clock_ranges) in yellow_carp_set_watermarks_table() argument493 if (!table || !clock_ranges) in yellow_carp_set_watermarks_table()496 if (clock_ranges) { in yellow_carp_set_watermarks_table()497 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in yellow_carp_set_watermarks_table()498 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in yellow_carp_set_watermarks_table()501 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in yellow_carp_set_watermarks_table()503 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in yellow_carp_set_watermarks_table()505 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in yellow_carp_set_watermarks_table()507 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in yellow_carp_set_watermarks_table()509 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in yellow_carp_set_watermarks_table()[all …]
1034 struct pp_smu_wm_range_sets *clock_ranges) in renoir_set_watermarks_table() argument1040 if (clock_ranges) { in renoir_set_watermarks_table()1041 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in renoir_set_watermarks_table()1042 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in renoir_set_watermarks_table()1046 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in renoir_set_watermarks_table()1048 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in renoir_set_watermarks_table()1050 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in renoir_set_watermarks_table()1052 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in renoir_set_watermarks_table()1054 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in renoir_set_watermarks_table()1057 clock_ranges->reader_wm_sets[i].wm_inst; in renoir_set_watermarks_table()[all …]
1590 struct pp_smu_wm_range_sets *clock_ranges) in vangogh_set_watermarks_table() argument1596 if (!table || !clock_ranges) in vangogh_set_watermarks_table()1599 if (clock_ranges) { in vangogh_set_watermarks_table()1600 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in vangogh_set_watermarks_table()1601 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in vangogh_set_watermarks_table()1604 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in vangogh_set_watermarks_table()1606 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in vangogh_set_watermarks_table()1608 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in vangogh_set_watermarks_table()1610 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in vangogh_set_watermarks_table()1612 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in vangogh_set_watermarks_table()[all …]
1929 struct pp_smu_wm_range_sets *clock_ranges) in navi10_set_watermarks_table() argument1935 if (clock_ranges) { in navi10_set_watermarks_table()1936 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in navi10_set_watermarks_table()1937 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in navi10_set_watermarks_table()1940 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in navi10_set_watermarks_table()1942 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in navi10_set_watermarks_table()1944 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in navi10_set_watermarks_table()1946 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in navi10_set_watermarks_table()1948 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in navi10_set_watermarks_table()1951 clock_ranges->reader_wm_sets[i].wm_inst; in navi10_set_watermarks_table()[all …]
1611 struct pp_smu_wm_range_sets *clock_ranges) in sienna_cichlid_set_watermarks_table() argument1617 if (clock_ranges) { in sienna_cichlid_set_watermarks_table()1618 if (clock_ranges->num_reader_wm_sets > NUM_WM_RANGES || in sienna_cichlid_set_watermarks_table()1619 clock_ranges->num_writer_wm_sets > NUM_WM_RANGES) in sienna_cichlid_set_watermarks_table()1622 for (i = 0; i < clock_ranges->num_reader_wm_sets; i++) { in sienna_cichlid_set_watermarks_table()1624 clock_ranges->reader_wm_sets[i].min_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()1626 clock_ranges->reader_wm_sets[i].max_drain_clk_mhz; in sienna_cichlid_set_watermarks_table()1628 clock_ranges->reader_wm_sets[i].min_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()1630 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()1633 clock_ranges->reader_wm_sets[i].wm_inst; in sienna_cichlid_set_watermarks_table()[all …]
73 #define smu_set_watermarks_table(smu, clock_ranges) smu_ppt_funcs(set_watermarks_table, 0, smu, c… argument
2054 struct pp_smu_wm_range_sets *clock_ranges) in smu_set_watermarks_for_clock_ranges() argument2067 ret = smu_set_watermarks_table(smu, clock_ranges); in smu_set_watermarks_for_clock_ranges()
465 void *clock_ranges) in phm_set_watermarks_for_clocks_ranges() argument473 clock_ranges); in phm_set_watermarks_for_clocks_ranges()
1343 void *clock_ranges) in smu10_set_watermarks_for_clocks_ranges() argument1346 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in smu10_set_watermarks_for_clocks_ranges()
1977 void *clock_ranges) in vega12_set_watermarks_for_clocks_ranges() argument1981 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in vega12_set_watermarks_for_clocks_ranges()
2937 void *clock_ranges) in vega20_set_watermarks_for_clocks_ranges() argument2941 struct dm_pp_wm_sets_with_clock_ranges_soc15 *wm_with_clock_ranges = clock_ranges; in vega20_set_watermarks_for_clocks_ranges()
459 void *clock_ranges);
742 struct pp_smu_wm_range_sets *clock_ranges);
310 int (*set_watermarks_for_clocks_ranges)(struct pp_hwmgr *hwmgr, void *clock_ranges);
1209 void *clock_ranges) in pp_set_watermarks_for_clocks_ranges() argument1214 if (!hwmgr || !hwmgr->pm_en || !clock_ranges) in pp_set_watermarks_for_clocks_ranges()1219 clock_ranges); in pp_set_watermarks_for_clocks_ranges()
367 void *clock_ranges);
