Searched refs:chanA (Results 1 – 5 of 5) sorted by relevance
| /Linux-v5.15/drivers/net/wan/ |
| D | hostess_sv11.c | 83 err = z8530_sync_open(d, &sv11->chanA); in hostess_open() 86 err = z8530_sync_dma_open(d, &sv11->chanA); in hostess_open() 89 err = z8530_sync_txdma_open(d, &sv11->chanA); in hostess_open() 100 z8530_sync_close(d, &sv11->chanA); in hostess_open() 103 z8530_sync_dma_close(d, &sv11->chanA); in hostess_open() 106 z8530_sync_txdma_close(d, &sv11->chanA); in hostess_open() 111 sv11->chanA.rx_function = hostess_input; in hostess_open() 126 sv11->chanA.rx_function = z8530_null_rx; in hostess_close() 133 z8530_sync_close(d, &sv11->chanA); in hostess_close() 136 z8530_sync_dma_close(d, &sv11->chanA); in hostess_close() [all …]
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| D | sealevel.c | 192 b->dev[0].chan = &b->board.chanA; in slvl_init() 211 dev->chanA.ctrlio = iobase + 1; in slvl_init() 212 dev->chanA.dataio = iobase; in slvl_init() 216 dev->chanA.irqs = &z8530_nop; in slvl_init() 234 dev->chanA.private = &b->dev[0]; in slvl_init() 236 dev->chanA.dev = dev; in slvl_init() 239 dev->chanA.txdma = 3; in slvl_init() 240 dev->chanA.rxdma = 1; in slvl_init() 241 if (request_dma(dev->chanA.txdma, "SeaLevel (TX)")) in slvl_init() 244 if (request_dma(dev->chanA.rxdma, "SeaLevel (RX)")) in slvl_init() [all …]
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| D | z85230.c | 663 intr = read_zsreg(&dev->chanA, R3); in z8530_interrupt() 676 irqs = dev->chanA.irqs; in z8530_interrupt() 680 irqs->rx(&dev->chanA); in z8530_interrupt() 682 irqs->tx(&dev->chanA); in z8530_interrupt() 684 irqs->status(&dev->chanA); in z8530_interrupt() 1142 dev->chanA.irqs = &z8530_nop; in do_z8530_init() 1144 dev->chanA.dcdcheck = DCD; in do_z8530_init() 1148 write_zsreg(&dev->chanA, R9, 0xC0); in do_z8530_init() 1151 write_zsreg(&dev->chanA, R12, 0xAA); in do_z8530_init() 1152 if (read_zsreg(&dev->chanA, R12) != 0xAA) in do_z8530_init() [all …]
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| D | z85230.h | 340 struct z8530_channel chanA; /* SCC channel A */ member
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| /Linux-v5.15/Documentation/networking/device_drivers/wan/ |
| D | z8530book.rst | 65 The structure holds two channel structures. Initialise chanA.ctrlio and 66 chanA.dataio with the address of the control and data ports. You can or 70 platforms, eg for MMIO. Initialise the chanA.irqs to &z8530_nop to 73 Set chanA.dev to point to the device structure itself. The private and
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