Searched refs:cachelines (Results 1 – 11 of 11) sorted by relevance
32 for cachelines with highest contention - highest number of HITM accesses.161 - sort all cachelines based on user settings165 1) most expensive cachelines list184 - sum of all cachelines accesses283 - overall statistics on shared cachelines286 - list of most expensive cachelines294 through cachelines list and to display offset details.
21 multi-CPU system these may be on cachelines that keep bouncing
26 multi-CPU system these may be on cachelines that keep bouncing
65 struct radix_tree_root cachelines; member81 radix_tree_delete(&state->cachelines, hwsp_cacheline(tl)); in __mock_hwsp_record()109 err = radix_tree_insert(&state->cachelines, cacheline, tl); in __mock_hwsp_timeline()159 INIT_RADIX_TREE(&state.cachelines, GFP_KERNEL); in mock_hwsp_freelist()
8 CXL.mem). The CXL.cache protocol allows devices to hold cachelines
287 objects are aligned on cachelines.
40 be full sized. Variables that straddle cachelines or pages void
36 even stores into cachelines of common dentries). This is known as "rcu-walk"
413 dirty only the log item cachelines. Normally I wouldn't be concerned about one414 vs two dirty cachelines except for the fact I've seen upwards of 80,000 log
1081 block. Interrupts are also disabled to avoid races where cachelines
1039 https://lore.kernel.org/r/40AC9823.6020709@colorfullife.com (split vars into cachelines)
