Searched refs:cacheline_size (Results 1 – 13 of 13) sorted by relevance
/Linux-v5.15/tools/perf/util/ |
D | cacheline.h | 7 int __pure cacheline_size(void); 12 return (address & ~(cacheline_size() - 1)); in cl_address() 18 return (address & (cacheline_size() - 1)); in cl_offset()
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D | cacheline.c | 17 int cacheline_size(void) in cacheline_size() function
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D | sort.c | 2874 if (sd->entry == &sort_mem_dcacheline && cacheline_size() == 0) in sort_dimension__add() 2920 if (!cacheline_size() && !strncasecmp(tok, "dcacheline", strlen(tok))) in setup_sort_list()
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/Linux-v5.15/drivers/gpu/drm/amd/amdkfd/ |
D | kfd_topology.h | 130 uint32_t cacheline_size; member
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D | kfd_topology.c | 355 cache->cacheline_size); in kfd_cache_show()
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D | kfd_crat.c | 973 props->cacheline_size = cache->cache_line_size; in kfd_parse_subtype_cache()
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/Linux-v5.15/drivers/scsi/ |
D | myrb.h | 297 unsigned short cacheline_size; /* Bytes 104-105 */ member
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D | myrs.h | 413 enum myrs_cacheline_size cacheline_size; /* Byte 7 */ member
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D | myrs.c | 1573 if (ldev_info->cacheline_size) { in myrs_mode_sense() 1575 put_unaligned_be16(1 << ldev_info->cacheline_size, in myrs_mode_sense()
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/Linux-v5.15/drivers/gpu/drm/i915/ |
D | intel_pm.c | 593 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE, 601 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE, 609 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE, 617 .cacheline_size = PINEVIEW_FIFO_LINE_SIZE, 625 .cacheline_size = I915_FIFO_LINE_SIZE, 633 .cacheline_size = I915_FIFO_LINE_SIZE, 641 .cacheline_size = I915_FIFO_LINE_SIZE, 649 .cacheline_size = I830_FIFO_LINE_SIZE, 657 .cacheline_size = I830_FIFO_LINE_SIZE, 665 .cacheline_size = I830_FIFO_LINE_SIZE, [all …]
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/Linux-v5.15/drivers/pci/ |
D | pci.c | 4387 u8 cacheline_size; in pci_set_cacheline_size() local 4394 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size() 4395 if (cacheline_size >= pci_cache_line_size && in pci_set_cacheline_size() 4396 (cacheline_size % pci_cache_line_size) == 0) in pci_set_cacheline_size() 4402 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &cacheline_size); in pci_set_cacheline_size() 4403 if (cacheline_size == pci_cache_line_size) in pci_set_cacheline_size()
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/Linux-v5.15/drivers/gpu/drm/i915/display/ |
D | intel_display_types.h | 1383 u8 cacheline_size; member
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/Linux-v5.15/drivers/net/ethernet/broadcom/ |
D | tg3.c | 16998 int cacheline_size; in tg3_calc_dma_bndry() local 17004 cacheline_size = 1024; in tg3_calc_dma_bndry() 17006 cacheline_size = (int) byte * 4; in tg3_calc_dma_bndry() 17046 switch (cacheline_size) { in tg3_calc_dma_bndry() 17071 switch (cacheline_size) { in tg3_calc_dma_bndry() 17088 switch (cacheline_size) { in tg3_calc_dma_bndry()
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