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Searched refs:asic_type (Results 1 – 25 of 125) sorted by relevance

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/Linux-v5.15/drivers/misc/habanalabs/common/
Dhabanalabs_drv.c75 enum hl_asic_type asic_type; in get_asic_type() local
79 asic_type = ASIC_GOYA; in get_asic_type()
82 asic_type = ASIC_GAUDI; in get_asic_type()
85 asic_type = ASIC_GAUDI_SEC; in get_asic_type()
88 asic_type = ASIC_INVALID; in get_asic_type()
92 return asic_type; in get_asic_type()
95 static bool is_asic_secured(enum hl_asic_type asic_type) in is_asic_secured() argument
97 switch (asic_type) { in is_asic_secured()
288 enum hl_asic_type asic_type, int minor) in create_hdev() argument
303 hdev->asic_type = get_asic_type(pdev->device); in create_hdev()
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/Linux-v5.15/drivers/gpu/drm/amd/amdgpu/
Dhdp_v4_0.c52 if (adev->asic_type == CHIP_ALDEBARAN) in hdp_v4_0_invalidate_hdp()
82 if (adev->asic_type >= CHIP_ALDEBARAN) in hdp_v4_0_reset_ras_error_count()
94 if (adev->asic_type == CHIP_VEGA10 || in hdp_v4_0_update_clock_gating()
95 adev->asic_type == CHIP_VEGA12 || in hdp_v4_0_update_clock_gating()
96 adev->asic_type == CHIP_RAVEN) { in hdp_v4_0_update_clock_gating()
138 switch (adev->asic_type) { in hdp_v4_0_init_registers()
Dgmc_v9_0.c418 if (adev->asic_type >= CHIP_VEGA20) in gmc_v9_0_ecc_interrupt_state()
582 (adev->asic_type < CHIP_ALDEBARAN)) in gmc_v9_0_process_interrupt()
600 switch (adev->asic_type) { in gmc_v9_0_process_interrupt()
697 if (adev->asic_type == CHIP_ALDEBARAN) in gmc_v9_0_use_invalidate_semaphore()
748 adev->asic_type == CHIP_VEGA20) { in gmc_v9_0_flush_gpu_tlb()
811 (adev->asic_type < CHIP_ALDEBARAN)) in gmc_v9_0_flush_gpu_tlb()
877 adev->asic_type == CHIP_VEGA20); in gmc_v9_0_flush_gpu_tlb_pasid()
1091 if ((adev->asic_type == CHIP_ARCTURUS || in gmc_v9_0_get_vm_pte()
1092 adev->asic_type == CHIP_ALDEBARAN) && in gmc_v9_0_get_vm_pte()
1097 if (adev->asic_type == CHIP_ALDEBARAN) in gmc_v9_0_get_vm_pte()
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Dumc_v6_1.c100 if (adev->asic_type == CHIP_ARCTURUS) { in umc_v6_1_clear_error_count_per_channel()
178 if (adev->asic_type == CHIP_ARCTURUS) { in umc_v6_1_query_correctable_error_count()
233 if (adev->asic_type == CHIP_ARCTURUS) { in umc_v6_1_querry_uncorrectable_error_count()
268 if ((adev->asic_type == CHIP_ARCTURUS) && in umc_v6_1_query_ras_error_count()
285 if ((adev->asic_type == CHIP_ARCTURUS) && in umc_v6_1_query_ras_error_count()
306 if (adev->asic_type == CHIP_ARCTURUS) { in umc_v6_1_query_error_address()
383 if ((adev->asic_type == CHIP_ARCTURUS) && in umc_v6_1_query_ras_error_address()
399 if ((adev->asic_type == CHIP_ARCTURUS) && in umc_v6_1_query_ras_error_address()
413 if (adev->asic_type == CHIP_ARCTURUS) { in umc_v6_1_err_cnt_init_per_channel()
Dsoc15.c157 switch (adev->asic_type) { in soc15_query_video_codecs()
335 if (adev->asic_type == CHIP_RENOIR) in soc15_get_xclk()
337 if (adev->asic_type == CHIP_RAVEN) in soc15_get_xclk()
568 switch (adev->asic_type) { in soc15_asic_reset_method()
632 switch (adev->asic_type) { in soc15_supports_baco()
726 switch (adev->asic_type) { in soc15_reg_base_init()
754 DRM_ERROR("Unsupported asic type: %d!\n", adev->asic_type); in soc15_reg_base_init()
778 } else if (adev->asic_type == CHIP_VEGA20 || in soc15_set_ip_blocks()
779 adev->asic_type == CHIP_ARCTURUS || in soc15_set_ip_blocks()
780 adev->asic_type == CHIP_ALDEBARAN) { in soc15_set_ip_blocks()
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Dnbio_v7_4.c111 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_get_rev_id()
156 if (adev->asic_type == CHIP_ALDEBARAN && instance == 4) in nbio_v7_4_sdma_doorbell_range()
184 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_vcn_doorbell_range()
357 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_handle_ras_controller_intr_no_bifring()
368 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_handle_ras_controller_intr_no_bifring()
413 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring()
425 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_handle_ras_err_event_athub_intr_no_bifring()
446 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_set_ras_controller_irq_state()
458 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_set_ras_controller_irq_state()
491 if (adev->asic_type == CHIP_ALDEBARAN) in nbio_v7_4_set_ras_err_event_athub_irq_state()
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Dgmc_v10_0.c136 (adev->asic_type < CHIP_SIENNA_CICHLID)) in gmc_v10_0_process_interrupt()
271 (adev->asic_type < CHIP_SIENNA_CICHLID)) in gmc_v10_0_flush_vm_hub()
660 switch (adev->asic_type) { in gmc_v10_0_set_umc_funcs()
677 switch (adev->asic_type) { in gmc_v10_0_set_mmhub_funcs()
690 switch (adev->asic_type) { in gmc_v10_0_set_gfxhub_funcs()
804 switch (adev->asic_type) { in gmc_v10_0_mc_init()
874 switch (adev->asic_type) { in gmc_v10_0_sw_init()
992 switch (adev->asic_type) { in gmc_v10_0_init_golden_registers()
1165 if (adev->asic_type >= CHIP_SIENNA_CICHLID && in gmc_v10_0_set_clockgating_state()
1166 adev->asic_type <= CHIP_YELLOW_CARP) in gmc_v10_0_set_clockgating_state()
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Dnbio_v7_2.c62 if (adev->asic_type == CHIP_YELLOW_CARP) in nbio_v7_2_get_rev_id()
76 if (adev->asic_type == CHIP_YELLOW_CARP) in nbio_v7_2_mc_access_enable()
85 if (adev->asic_type == CHIP_YELLOW_CARP) in nbio_v7_2_mc_access_enable()
253 if (adev->asic_type == CHIP_YELLOW_CARP) { in nbio_v7_2_update_medium_grain_light_sleep()
355 if (adev->asic_type == CHIP_YELLOW_CARP) { in nbio_v7_2_init_registers()
Damdgpu_reset.c39 switch (adev->asic_type) { in amdgpu_reset_init()
54 switch (adev->asic_type) { in amdgpu_reset_fini()
Dgfxhub_v1_1.c52 if (adev->asic_type == CHIP_ALDEBARAN) { in gfxhub_v1_1_get_xgmi_info()
68 switch (adev->asic_type) { in gfxhub_v1_1_get_xgmi_info()
Dvce_v3_0.c305 if (adev->asic_type >= CHIP_STONEY) in vce_v3_0_start()
342 if (adev->asic_type >= CHIP_STONEY) in vce_v3_0_stop()
368 if ((adev->asic_type == CHIP_FIJI) || in vce_v3_0_get_harvest_config()
369 (adev->asic_type == CHIP_STONEY)) in vce_v3_0_get_harvest_config()
389 if ((adev->asic_type == CHIP_POLARIS10) || in vce_v3_0_get_harvest_config()
390 (adev->asic_type == CHIP_POLARIS11) || in vce_v3_0_get_harvest_config()
391 (adev->asic_type == CHIP_POLARIS12) || in vce_v3_0_get_harvest_config()
392 (adev->asic_type == CHIP_VEGAM)) in vce_v3_0_get_harvest_config()
564 if (adev->asic_type >= CHIP_STONEY) { in vce_v3_0_mc_resume()
971 if (adev->asic_type >= CHIP_STONEY) { in vce_v3_0_set_ring_funcs()
Dmmhub_v2_0.c156 switch (adev->asic_type) { in mmhub_v2_0_print_l2_protection_fault_status()
574 switch (adev->asic_type) { in mmhub_v2_0_update_medium_grain_clock_gating()
609 switch (adev->asic_type) { in mmhub_v2_0_update_medium_grain_clock_gating()
636 switch (adev->asic_type) { in mmhub_v2_0_update_medium_grain_light_sleep()
654 switch (adev->asic_type) { in mmhub_v2_0_update_medium_grain_light_sleep()
674 switch (adev->asic_type) { in mmhub_v2_0_set_clockgating()
701 switch (adev->asic_type) { in mmhub_v2_0_get_clockgating()
Ddf_v3_6.c223 if ((adev->asic_type == CHIP_ARCTURUS && in df_v3_6_query_hashes()
225 (adev->asic_type == CHIP_ALDEBARAN && in df_v3_6_query_hashes()
280 if (adev->asic_type == CHIP_ALDEBARAN) { in df_v3_6_get_fb_channel_number()
520 switch (adev->asic_type) { in df_v3_6_pmc_start()
562 switch (adev->asic_type) { in df_v3_6_pmc_stop()
601 switch (adev->asic_type) { in df_v3_6_pmc_get_count()
Damdgpu_acp.c258 switch (adev->asic_type) { in acp_hw_init()
270 switch (adev->asic_type) { in acp_hw_init()
287 switch (adev->asic_type) { in acp_hw_init()
328 adev->acp.acp_cell[0].platform_data = &adev->asic_type; in acp_hw_init()
329 adev->acp.acp_cell[0].pdata_size = sizeof(adev->asic_type); in acp_hw_init()
Dvi.c105 #define ASIC_IS_P22(asic_type, rid) ((asic_type >= CHIP_POLARIS10) && \ argument
106 (asic_type <= CHIP_POLARIS12) && \
260 switch (adev->asic_type) { in vi_query_video_codecs()
496 switch (adev->asic_type) { in vi_init_golden_registers()
900 switch (adev->asic_type) { in vi_asic_supports_baco()
926 switch (adev->asic_type) { in vi_asic_reset_method()
1143 adev->asic_type < CHIP_POLARIS10) in vi_program_aspm()
1282 if ((adev->asic_type == CHIP_POLARIS12 && in vi_program_aspm()
1284 ASIC_IS_P22(adev->asic_type, adev->external_rev_id)) { in vi_program_aspm()
1347 switch (adev->asic_type) { in vi_need_full_reset()
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Dsdma_v4_0.c472 switch (adev->asic_type) { in sdma_v4_0_init_golden_registers()
541 switch (adev->asic_type) { in sdma_v4_0_setup_ulv()
592 if (adev->asic_type == CHIP_ARCTURUS || in sdma_v4_0_destroy_inst_ctx()
593 adev->asic_type == CHIP_ALDEBARAN) in sdma_v4_0_destroy_inst_ctx()
623 switch (adev->asic_type) { in sdma_v4_0_init_microcode()
668 if (adev->asic_type == CHIP_ARCTURUS || in sdma_v4_0_init_microcode()
669 adev->asic_type == CHIP_ALDEBARAN) { in sdma_v4_0_init_microcode()
1109 if (adev->asic_type == CHIP_ARCTURUS && in sdma_v4_0_ctx_switch_enable()
1396 switch (adev->asic_type) { in sdma_v4_0_init_pg()
1838 switch (adev->asic_type) { in sdma_v4_0_fw_support_paging_queue()
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Dnbio_v2_3.c479 if (!((adev->asic_type >= CHIP_NAVI10) && in nbio_v2_3_apply_lc_spc_mode_wa()
480 (adev->asic_type <= CHIP_NAVI12))) in nbio_v2_3_apply_lc_spc_mode_wa()
503 if (adev->asic_type != CHIP_NAVI10) in nbio_v2_3_apply_l1_link_width_reconfig_wa()
515 if (adev->asic_type != CHIP_SIENNA_CICHLID) in nbio_v2_3_clear_doorbell_interrupt()
Dmmhub_v1_0.c454 if (adev->asic_type != CHIP_RAVEN) { in mmhub_v1_0_update_medium_grain_clock_gating()
470 if (adev->asic_type != CHIP_RAVEN) in mmhub_v1_0_update_medium_grain_clock_gating()
487 if (adev->asic_type != CHIP_RAVEN) in mmhub_v1_0_update_medium_grain_clock_gating()
500 if (adev->asic_type != CHIP_RAVEN) in mmhub_v1_0_update_medium_grain_clock_gating()
506 if (adev->asic_type != CHIP_RAVEN && def2 != data2) in mmhub_v1_0_update_medium_grain_clock_gating()
532 switch (adev->asic_type) { in mmhub_v1_0_set_clockgating()
Dnv.c183 switch (adev->asic_type) { in nv_query_video_codecs()
514 switch (adev->asic_type) { in nv_asic_reset_method()
643 switch (adev->asic_type) { in nv_reg_base_init()
688 if (adev->asic_type == CHIP_CYAN_SKILLFISH) { in nv_set_ip_blocks()
700 if (adev->asic_type >= CHIP_SIENNA_CICHLID) in nv_set_ip_blocks()
705 if (adev->asic_type == CHIP_SIENNA_CICHLID) in nv_set_ip_blocks()
713 switch (adev->asic_type) { in nv_set_ip_blocks()
1059 switch (adev->asic_type) { in nv_common_early_init()
1391 switch (adev->asic_type) { in nv_common_set_clockgating_state()
Damdgpu_device.c1022 if (adev->asic_type < CHIP_BONAIRE) { in amdgpu_device_doorbell_init()
1050 if (adev->asic_type >= CHIP_VEGA10) in amdgpu_device_doorbell_init()
1225 if (adev->asic_type >= CHIP_BONAIRE) in amdgpu_device_resize_fb_bar()
1275 if (adev->asic_type == CHIP_FIJI) { in amdgpu_device_need_post()
1299 if (adev->asic_type >= CHIP_BONAIRE) in amdgpu_device_need_post()
1422 adev->asic_type < CHIP_RAVEN) in amdgpu_device_init_apu_flags()
1425 switch (adev->asic_type) { in amdgpu_device_init_apu_flags()
1901 if (adev->asic_type != CHIP_NAVI12) in amdgpu_device_parse_gpu_info_fw()
1905 switch (adev->asic_type) { in amdgpu_device_parse_gpu_info_fw()
2006 if (adev->asic_type == CHIP_NAVI12) in amdgpu_device_parse_gpu_info_fw()
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Damdgpu_uvd.c148 switch (adev->asic_type) { in amdgpu_uvd_sw_init()
239 if (adev->asic_type < CHIP_VEGA20) { in amdgpu_uvd_sw_init()
260 if ((adev->asic_type == CHIP_POLARIS10 || in amdgpu_uvd_sw_init()
261 adev->asic_type == CHIP_POLARIS11) && in amdgpu_uvd_sw_init()
305 switch (adev->asic_type) { in amdgpu_uvd_sw_init()
319 adev->uvd.use_ctx_buf = adev->asic_type >= CHIP_POLARIS10; in amdgpu_uvd_sw_init()
384 if (adev->asic_type < CHIP_POLARIS10) { in amdgpu_uvd_suspend()
1101 if (adev->asic_type >= CHIP_VEGA10) { in amdgpu_uvd_send_msg()
Damdgpu_gmc.c128 if (adev->asic_type >= CHIP_VEGA10) { in amdgpu_gmc_pd_addr()
569 switch (adev->asic_type) { in amdgpu_gmc_tmz_set()
618 switch (adev->asic_type) { in amdgpu_gmc_noretry_set()
690 switch (adev->asic_type) { in amdgpu_gmc_get_vbios_allocations()
818 switch (adev->asic_type) { in amdgpu_gmc_get_reserved_allocation()
/Linux-v5.15/sound/soc/amd/
Dacp-pcm-dma.c206 u32 asic_type) in set_acp_sysmem_dma_descriptors() argument
218 switch (asic_type) { in set_acp_sysmem_dma_descriptors()
235 switch (asic_type) { in set_acp_sysmem_dma_descriptors()
264 u16 dma_dscr_idx, u32 asic_type) in set_acp_to_i2s_dma_descriptors() argument
332 u32 asic_type) in config_acp_dma() argument
350 rtd->dma_dscr_idx_1, asic_type); in config_acp_dma()
355 rtd->dma_dscr_idx_2, asic_type); in config_acp_dma()
551 static int acp_init(void __iomem *acp_mmio, u32 asic_type) in acp_init() argument
637 if (asic_type != CHIP_STONEY) { in acp_init()
775 switch (intr_data->asic_type) { in acp_dma_open()
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/Linux-v5.15/drivers/gpu/drm/amd/pm/
Damdgpu_pm.c360 if (adev->asic_type == CHIP_RAVEN) { in amdgpu_set_power_dpm_force_performance_level()
2045 enum amd_asic_type asic_type = adev->asic_type; in default_attr_update() local
2055 if (asic_type < CHIP_VEGA10) in default_attr_update()
2058 if (asic_type < CHIP_VEGA10 || in default_attr_update()
2059 asic_type == CHIP_ARCTURUS || in default_attr_update()
2060 asic_type == CHIP_ALDEBARAN) in default_attr_update()
2063 if (asic_type < CHIP_VEGA20) in default_attr_update()
2072 if (adev->flags & AMD_IS_APU || asic_type == CHIP_VEGA10) in default_attr_update()
2079 if (asic_type != CHIP_VEGA10 && in default_attr_update()
2080 asic_type != CHIP_VEGA20 && in default_attr_update()
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/Linux-v5.15/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dsmu_v11_0.c93 ((adev->asic_type == CHIP_NAVI12) || in smu_v11_0_init_microcode()
94 (adev->asic_type == CHIP_SIENNA_CICHLID))) in smu_v11_0_init_microcode()
97 switch (adev->asic_type) { in smu_v11_0_init_microcode()
123 dev_err(adev->dev, "Unsupported ASIC type %d\n", adev->asic_type); in smu_v11_0_init_microcode()
241 switch (smu->adev->asic_type) { in smu_v11_0_check_fw_version()
273 dev_err(smu->adev->dev, "smu unsupported asic type:%d.\n", smu->adev->asic_type); in smu_v11_0_check_fw_version()
496 size_t size = smu->adev->asic_type == CHIP_VANGOGH ? in smu_v11_0_init_power()
753 if (adev->asic_type >= CHIP_NAVY_FLOUNDER && in smu_v11_0_init_display_count()
754 adev->asic_type <= CHIP_BEIGE_GOBY) in smu_v11_0_init_display_count()
1139 switch (adev->asic_type) { in smu_v11_0_gfx_off_control()
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