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Searched refs:aeqe (Results 1 – 7 of 7) sorted by relevance

/Linux-v5.15/drivers/infiniband/hw/hns/
Dhns_roce_hw_v1.c3682 struct hns_roce_aeqe *aeqe, int qpn) in hns_roce_v1_wq_catas_err_handle() argument
3687 switch (roce_get_field(aeqe->asyn, HNS_ROCE_AEQE_U32_4_EVENT_SUB_TYPE_M, in hns_roce_v1_wq_catas_err_handle()
3716 struct hns_roce_aeqe *aeqe, in hns_roce_v1_local_wq_access_err_handle() argument
3722 switch (roce_get_field(aeqe->asyn, HNS_ROCE_AEQE_U32_4_EVENT_SUB_TYPE_M, in hns_roce_v1_local_wq_access_err_handle()
3751 struct hns_roce_aeqe *aeqe, in hns_roce_v1_qp_err_handle() argument
3758 qpn = roce_get_field(aeqe->event.queue_event.num, in hns_roce_v1_qp_err_handle()
3761 phy_port = roce_get_field(aeqe->event.queue_event.num, in hns_roce_v1_qp_err_handle()
3773 hns_roce_v1_wq_catas_err_handle(hr_dev, aeqe, qpn); in hns_roce_v1_qp_err_handle()
3776 hns_roce_v1_local_wq_access_err_handle(hr_dev, aeqe, qpn); in hns_roce_v1_qp_err_handle()
3786 struct hns_roce_aeqe *aeqe, in hns_roce_v1_cq_err_handle() argument
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Dhns_roce_hw_v2.c5624 struct hns_roce_aeqe *aeqe; in next_aeqe_sw_v2() local
5626 aeqe = hns_roce_buf_offset(eq->mtr.kmem, in next_aeqe_sw_v2()
5630 return (roce_get_bit(aeqe->asyn, HNS_ROCE_V2_AEQ_AEQE_OWNER_S) ^ in next_aeqe_sw_v2()
5631 !!(eq->cons_index & eq->entries)) ? aeqe : NULL; in next_aeqe_sw_v2()
5638 struct hns_roce_aeqe *aeqe = next_aeqe_sw_v2(eq); in hns_roce_v2_aeq_int() local
5644 while (aeqe) { in hns_roce_v2_aeq_int()
5650 event_type = roce_get_field(aeqe->asyn, in hns_roce_v2_aeq_int()
5653 sub_type = roce_get_field(aeqe->asyn, in hns_roce_v2_aeq_int()
5656 queue_num = roce_get_field(aeqe->event.queue_event.num, in hns_roce_v2_aeq_int()
5683 le16_to_cpu(aeqe->event.cmd.token), in hns_roce_v2_aeq_int()
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/Linux-v5.15/drivers/net/ethernet/huawei/hinic/
Dhinic_hw_eqs.c594 struct hinic_aeq_elem *aeqe; in aeq_elements_init() local
598 aeqe = GET_AEQ_ELEM(eq, i); in aeq_elements_init()
599 aeqe->desc = cpu_to_be32(init_val); in aeq_elements_init()
/Linux-v5.15/drivers/infiniband/hw/bnxt_re/
Dmain.c867 void *aeqe, void *obj) in bnxt_re_aeq_handler() argument
874 type = ((struct creq_base *)aeqe)->type; in bnxt_re_aeq_handler()
876 unaffi_async = aeqe; in bnxt_re_aeq_handler()
879 affi_async = aeqe; in bnxt_re_aeq_handler()
/Linux-v5.15/drivers/crypto/hisilicon/
Dqm.c90 #define QM_AEQE_PHASE(aeqe) ((le32_to_cpu((aeqe)->dw0) >> 16) & 0x1) argument
889 struct qm_aeqe *aeqe = qm->aeqe + qm->status.aeq_head; in qm_aeq_irq() local
896 while (QM_AEQE_PHASE(aeqe) == qm->status.aeqc_phase) { in qm_aeq_irq()
897 type = le32_to_cpu(aeqe->dw0) >> QM_AEQE_TYPE_SHIFT; in qm_aeq_irq()
907 aeqe = qm->aeqe; in qm_aeq_irq()
910 aeqe++; in qm_aeq_irq()
1789 } else if (qm->aeqe && !strcmp(name, "AEQE")) { in qm_eq_aeq_dump()
1790 xeqe = qm->aeqe + xeqe_id; in qm_eq_aeq_dump()
5733 QM_INIT_BUF(qm, aeqe, QM_Q_DEPTH); in hisi_qm_memory_init()
Dqm.h238 struct qm_aeqe *aeqe; member
/Linux-v5.15/drivers/infiniband/hw/irdma/
Dctrl.c4043 __le64 *aeqe; in irdma_sc_get_next_aeqe() local
4048 aeqe = IRDMA_GET_CURRENT_AEQ_ELEM(aeq); in irdma_sc_get_next_aeqe()
4049 get_64bit_val(aeqe, 0, &compl_ctx); in irdma_sc_get_next_aeqe()
4050 get_64bit_val(aeqe, 8, &temp); in irdma_sc_get_next_aeqe()
4057 aeqe, 16, false); in irdma_sc_get_next_aeqe()