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Searched refs:XAXIDMA_RX_CR_OFFSET (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.15/drivers/net/ethernet/ni/
Dnixge.c31 #define XAXIDMA_RX_CR_OFFSET 0x30 /* Channel control */ macro
343 cr = nixge_dma_read_reg(priv, XAXIDMA_RX_CR_OFFSET); in nixge_hw_dma_bd_init()
353 nixge_dma_write_reg(priv, XAXIDMA_RX_CR_OFFSET, cr); in nixge_hw_dma_bd_init()
372 cr = nixge_dma_read_reg(priv, XAXIDMA_RX_CR_OFFSET); in nixge_hw_dma_bd_init()
373 nixge_dma_write_reg(priv, XAXIDMA_RX_CR_OFFSET, in nixge_hw_dma_bd_init()
416 __nixge_device_reset(priv, XAXIDMA_RX_CR_OFFSET); in nixge_device_reset()
688 cr = nixge_dma_read_reg(priv, XAXIDMA_RX_CR_OFFSET); in nixge_poll()
690 nixge_dma_write_reg(priv, XAXIDMA_RX_CR_OFFSET, cr); in nixge_poll()
728 cr = nixge_dma_read_reg(priv, XAXIDMA_RX_CR_OFFSET); in nixge_tx_irq()
732 nixge_dma_write_reg(priv, XAXIDMA_RX_CR_OFFSET, cr); in nixge_tx_irq()
[all …]
/Linux-v5.15/drivers/net/ethernet/xilinx/
Dxilinx_axienet_main.c299 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_dma_bd_init()
309 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_dma_bd_init()
328 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_dma_bd_init()
329 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, in axienet_dma_bd_init()
938 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_tx_irq()
942 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_tx_irq()
988 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_rx_irq()
992 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_rx_irq()
1127 cr = axienet_dma_in32(lp, XAXIDMA_RX_CR_OFFSET); in axienet_stop()
1129 axienet_dma_out32(lp, XAXIDMA_RX_CR_OFFSET, cr); in axienet_stop()
[all …]
Dxilinx_axienet.h79 #define XAXIDMA_RX_CR_OFFSET 0x00000030 /* Channel control */ macro