Home
last modified time | relevance | path

Searched refs:TRCSSPCICRn (Results 1 – 3 of 3) sorted by relevance

/Linux-v5.15/drivers/hwtracing/coresight/
Dcoresight-etm4x.h82 #define TRCSSPCICRn(n) (0x2C0 + (n * 4)) macro
285 CASE_##op((val), TRCSSPCICRn(0)) \
286 CASE_##op((val), TRCSSPCICRn(1)) \
287 CASE_##op((val), TRCSSPCICRn(2)) \
288 CASE_##op((val), TRCSSPCICRn(3)) \
289 CASE_##op((val), TRCSSPCICRn(4)) \
290 CASE_##op((val), TRCSSPCICRn(5)) \
291 CASE_##op((val), TRCSSPCICRn(6)) \
292 CASE_##op((val), TRCSSPCICRn(7)) \
Dcoresight-etm4x-cfg.c83 } else if ((offset >= TRCSSCCRn(0)) && (offset <= TRCSSPCICRn(7))) { in etm4_cfg_map_reg_offset()
90 CHECKREGIDX(TRCSSPCICRn(0), ss_pe_cmp, idx, off_mask); in etm4_cfg_map_reg_offset()
Dcoresight-etm4x-core.c410 etm4x_relaxed_write32(csa, config->ss_pe_cmp[i], TRCSSPCICRn(i)); in etm4_enable_hw()
1638 state->trcsspcicr[i] = etm4x_read32(csa, TRCSSPCICRn(i)); in etm4_cpu_save()
1751 etm4x_relaxed_write32(csa, state->trcsspcicr[i], TRCSSPCICRn(i)); in etm4_cpu_restore()